MCIMX31C_10 Datasheet, PDF (70/108 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processors for Industrial and Automotive Products

Electrical Characteristics
DISPB_PAR_RS
DISPB_D#_CS
DISPB_RD (ENABLE_L)
DISPB_DATA[17]
(ENABLE_H)
DISPB_WR
(READ/WRITE)
DISPB_DATA
(Input)
DISPB_DATA
(Output)
IP28, IP27
IP35,IP33
IP36, IP34
IP37
IP31, IP29
read point
Read Data
IP38
IP39
IP32, IP30
IP40
IP46,IP44
IP47
IP45, IP43
IP42, IP41
Figure 59. Asynchronous Parallel System 68k Interface (Type 2) Timing Diagram
Table 47. Asynchronous Parallel Interface Timing Parameters—Access Level
ID
Parameter
Symbol
Min.
Typ.¹
Max.
Units
IP27 Read system cycle time
Tcycr Tdicpr–1.5
Tdicpr²
Tdicpr+1.5
ns
IP28 Write system cycle time
Tcycw Tdicpw–1.5
Tdicpw³
Tdicpw+1.5
ns
IP29 Read low pulse width
Trl Tdicdr–Tdicur–1.5
Tdicdr⁴–Tdicur⁵ Tdicdr–Tdicur+1.5
ns
IP30 Read high pulse width
IP31 Write low pulse width
Trh Tdicpr–Tdicdr+Tdicur–1.5 Tdicpr–Tdicdr+
Tdicur
Tdicpr–Tdicdr+Tdicur+1.5 ns
Twl Tdicdw–Tdicuw–1.5
Tdicdw⁶–Tdicuw⁷ Tdicdw–Tdicuw+1.5
ns
IP32 Write high pulse width
Twh Tdicpw–Tdicdw+
Tdicpw–Tdicdw+ Tdicpw–Tdicdw+
ns
Tdicuw–1.5
Tdicuw
Tdicuw+1.5
IP33 Controls setup time for read Tdcsr Tdicur–1.5
Tdicur
—
ns
IP34 Controls hold time for read Tdchr Tdicpr–Tdicdr–1.5
Tdicpr–Tdicdr
—
ns
IP35 Controls setup time for write Tdcsw Tdicuw–1.5
Tdicuw
—
ns
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
70
Freescale Semiconductor