K51P100M72SF1 Datasheet, PDF (70/77 Pages) Freescale Semiconductor, Inc – K51 Sub-Family

Pinout
104 100 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
MAP LQFP
BGA
OP0_DP5/
OP1_DP5
OP0_DP5/
OP1_DP5
OP0_DP5/
OP1_DP5
L7 — RTC_
RTC_
RTC_
WAKEUP_B WAKEUP_B WAKEUP_B
L4 36 XTAL32
XTAL32
XTAL32
L5 37 EXTAL32 EXTAL32 EXTAL32
K6 38 VBAT
VBAT
VBAT
J6 39 PTA0
JTAG_TCLK/ TSI0_CH1 PTA0
SWD_CLK/
EZP_CLK
UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5
H8 40 PTA1
JTAG_TDI/ TSI0_CH2 PTA1
EZP_DI
UART0_RX FTM0_CH6
J7 41 PTA2
JTAG_TDO/ TSI0_CH3 PTA2
TRACE_SWO/
EZP_DO
UART0_TX FTM0_CH7
H9 42 PTA3
JTAG_TMS/ TSI0_CH4 PTA3
SWD_DIO
UART0_RTS_ FTM0_CH0
b
J8 43 PTA4/
LLWU_P3
NMI_b/
TSI0_CH5
EZP_CS_b
PTA4/
LLWU_P3
FTM0_CH1
E5 — VDD
VDD
VDD
G3 — VSS
VSS
VSS
K8 44 PTA12
CMP2_IN0 CMP2_IN0 PTA12
FTM1_CH0
L8 45 PTA13/
LLWU_P4
K9 46 PTA14
CMP2_IN1
DISABLED
CMP2_IN1
PTA13/
LLWU_P4
PTA14
FTM1_CH1
SPI0_PCS0 UART0_TX
L9 47 PTA15
L10 48 VDD
K10 49 VSS
L11 50 PTA18
K11 51 PTA19
DISABLED
PTA15
VDD
VDD
VSS
VSS
EXTAL0
EXTAL0
PTA18
XTAL0
XTAL0
PTA19
SPI0_SCK UART0_RX
FTM0_FLT2 FTM_CLKIN0
FTM1_FLT0 FTM_CLKIN1
J11 52 RESET_b
G11 53 PTB0/
LLWU_P5
G10 54 PTB1
G9 55 PTB2
RESET_b
LCD_P0/
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
LCD_P1/
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
LCD_P2/
ADC0_SE12/
TSI0_CH7
RESET_b
LCD_P0/
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
LCD_P1/
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
LCD_P2/
ADC0_SE12/
TSI0_CH7
PTB0/
LLWU_P5
PTB1
PTB2
I2C0_SCL
I2C0_SDA
I2C0_SCL
FTM1_CH0
FTM1_CH1
UART0_RTS_
b
ALT5
ALT6
ALT7
EzPort
JTAG_TCLK/ EZP_CLK
SWD_CLK
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SWO
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
I2S0_TXD0
I2S0_TX_FS
I2S0_RX_
BCLK
I2S0_RXD0
FTM1_QD_
PHA
FTM1_QD_
PHB
I2S0_TXD1
LPTMR0_
ALT1
FTM1_QD_ LCD_P0
PHA
FTM1_QD_ LCD_P1
PHB
FTM0_FLT3 LCD_P2
K51 Sub-Family Data Sheet, Rev. 2, 4/2012.
70
Freescale Semiconductor, Inc.