K51P100M72SF1 Datasheet, PDF (69/77 Pages) Freescale Semiconductor, Inc – K51 Sub-Family

Pinout
104 100 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP LQFP
BGA
K1 17 PGA0_DP/ PGA0_DP/ PGA0_DP/
ADC0_DP0/ ADC0_DP0/ ADC0_DP0/
ADC1_DP3 ADC1_DP3 ADC1_DP3
K2 18 PGA0_DM/ PGA0_DM/ PGA0_DM/
ADC0_DM0/ ADC0_DM0/ ADC0_DM0/
ADC1_DM3 ADC1_DM3 ADC1_DM3
L1 19 PGA1_DP/ PGA1_DP/ PGA1_DP/
ADC1_DP0/ ADC1_DP0/ ADC1_DP0/
ADC0_DP3 ADC0_DP3 ADC0_DP3
L2 20 PGA1_DM/ PGA1_DM/ PGA1_DM/
ADC1_DM0/ ADC1_DM0/ ADC1_DM0/
ADC0_DM3 ADC0_DM3 ADC0_DM3
F5 21 VDDA
VDDA
VDDA
G5 22 VREFH
VREFH
VREFH
G6 23 VREFL
VREFL
VREFL
F6 24 VSSA
VSSA
VSSA
J3 25 ADC1_SE16/ ADC1_SE16/ ADC1_SE16/
OP1_OUT/ OP1_OUT/ OP1_OUT/
CMP2_IN2/ CMP2_IN2/ CMP2_IN2/
ADC0_SE22/ ADC0_SE22/ ADC0_SE22/
OP0_DP2/ OP0_DP2/ OP0_DP2/
OP1_DP2 OP1_DP2 OP1_DP2
H3 26 ADC0_SE16/ ADC0_SE16/ ADC0_SE16/
OP0_OUT/ OP0_OUT/ OP0_OUT/
CMP1_IN2/ CMP1_IN2/ CMP1_IN2/
ADC0_SE21/ ADC0_SE21/ ADC0_SE21/
OP0_DP1/ OP0_DP1/ OP0_DP1/
OP1_DP1 OP1_DP1 OP1_DP1
L3 27 VREF_OUT/ VREF_OUT/ VREF_OUT/
CMP1_IN5/ CMP1_IN5/ CMP1_IN5/
CMP0_IN5/ CMP0_IN5/ CMP0_IN5/
ADC1_SE18 ADC1_SE18 ADC1_SE18
K3 28 TRI0_OUT/ TRI0_OUT/ TRI0_OUT/
OP1_DM2 OP1_DM2 OP1_DM2
H4 29 TRI0_DM TRI0_DM TRI0_DM
J4 30 TRI0_DP TRI0_DP TRI0_DP
H5 31 NC
NC
NC
J5 32 NC
NC
NC
H6 33 CMP2_IN5/ CMP2_IN5/ CMP2_IN5/
ADC1_SE22 ADC1_SE22 ADC1_SE22
K5 34 DAC0_OUT/ DAC0_OUT/ DAC0_OUT/
CMP1_IN3/ CMP1_IN3/ CMP1_IN3/
ADC0_SE23/ ADC0_SE23/ ADC0_SE23/
OP0_DP4/ OP0_DP4/ OP0_DP4/
OP1_DP4 OP1_DP4 OP1_DP4
K4 35 CMP0_IN4/ CMP0_IN4/ CMP0_IN4/
CMP2_IN3/ CMP2_IN3/ CMP2_IN3/
ADC1_SE23/ ADC1_SE23/ ADC1_SE23/
K51 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
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