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MC9S08SV16 Datasheet, PDF (7/40 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)
Pin Assignments
Table 1. Pin Availability by Package Pin-Count (continued)
Pin Number
<-- Lowest Priority --> Highest
32-SDIP
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
32-LQFP
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Port Pin I/O
PTC3 I/O
PTC2 I/O
PTC1 I/O
PTC0 I/O
PTB3 I/O
PTD4 I/O
PTB2 I/O
PTB1 I/O
PTB0 I/O
PTA7 I/O
PTA6 I/O
PTA3 I/O
PTA2 I/O
PTA1 I/O
PTD5 I/O
PTA0 I/O
PTC7 I/O
PTC6 I/O
Alt 1
KBIP7
KBIP6
KBIP5
KBIP4
KBIP3
KBIP2
KBIP1
KBIP0
MISO
MOSI
I/O Alt 2 I/O Alt 3 I/O
ADP11 I ACMP– I
ADP10 I ACMP+ I
ADP9 I
ADP8 I
I ADP7 I
TPM1CH4 I/O
I ADP6 I
I
TxD I/O ADP5 I
I
RxD
I ADP4 I
TPM2CH1 I/O
TPM2CH0 I/O
I ADP3 I
I ADP2 I
I ADP1 I
TPM1CH5 I/O
I ADP0 I
I/O
I/O
NOTE
When an alternative function is first enabled, it is possible to get a spurious
edge to the module. User software must clear out any associated flags before
interrupts are enabled. Table 1 illustrates the priority if multiple modules are
enabled. The highest priority module will have control over the pin.
Selecting a higher priority pin function with a lower priority function
already enabled can cause spurious edges to the lower priority module.
Disable all modules that share a pin before enabling another module.
MC9S08SV16 Series Data Sheet, Rev. 2
Freescale Semiconductor
7