K51P121M100SF2 Datasheet, PDF (69/70 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

121 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
MAP
BGA
• PTD9
DISABLED
PTD9
I2C0_SDA UART5_TX
• PTD10
DISABLED
PTD10
UART5_RTS
_b
FB_AD9
• PTD11
DISABLED
PTD11
SPI2_PCS0 UART5_CTS SDHC0_CLK FB_AD8
_b
IN
• PTD12
DISABLED
PTD12
SPI2_SCK
SDHC0_D4 FB_AD7
• PTD13
DISABLED
PTD13
SPI2_SOUT
SDHC0_D5 FB_AD6
• PTD14
DISABLED
PTD14
SPI2_SIN
SDHC0_D6 FB_AD5
• PTD15
DISABLED
PTD15
SPI2_PCS1
SDHC0_D7 FB_RW_b
Revision History
ALT7
EzPort
8.2 K51 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
NOTE
The 121 MAPBGA ballmap assignments are currently being
developed.
9 Revision History
The following table provides a revision history for this document.
Table 50. Revision History
Rev. No.
2
3
4
Date
3/2011
3/2011
3/2011
Substantial Changes
Initial public revision
Added sections that were inadvertently removed in previous revision
Reworded I_IC footnote in "Voltage and Current Operating Requirements"
table.
Added paragraph to "Peripheral operating requirements and behaviors"
section.
Added "JTAG full voltage range electricals" table to the "JTAG electricals"
section.
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
69