K40P144M100SF2 Datasheet, PDF (60/68 Pages) Freescale Semiconductor, Inc – K40 Sub-Family Data Sheet

Pinout
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to www.freescale.com and perform a keyword search for
the drawing’s document number:
If you want the drawing for this package
Then use this document number
144-pin LQFP
144-pin MAPBGA
98ASS23177W
98ASA00222D
ry _{8 Pinout}
ina ^{8.1 K40 Signal Multiplexing and Pin Assignments}
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
lim ^{144 144 Default}
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
QFP BGA
— L5 NC
NC
— M5 NC
NC
e _{1 D3 ADC1_SE4a ADC1_SE4a PTE0}
SPI1_PCS1 UART1_TX SDHC0_D1 FB_AD27 I2C1_SDA
r _{2 D2 ADC1_SE5a ADC1_SE5a PTE1}
SPI1_SOUT UART1_RX SDHC0_D0 FB_AD26 I2C1_SCL
P ^{3 D1 ADC1_SE6a ADC1_SE6a PTE2}
SPI1_SCK UART1_CTS SDHC0_DCL FB_AD25
_b
K
4 E4 ADC1_SE7a ADC1_SE7a PTE3
SPI1_SIN
UART1_RTS SDHC0_CMD FB_AD24
_b
5 E5 VDD
VDD
6 F6 VSS
VSS
7 E3 DISABLED
PTE4
SPI1_PCS0 UART3_TX SDHC0_D3 FB_CS3_b/ FB_TA_b
FB_BE7_0_B
LS31_24_b
8 E2 DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2 FB_TBST_b/
FB_CS2_b/
FB_BE15_8_
BLS23_16_b
9 E1 DISABLED
PTE6
SPI1_PCS3 UART3_CTS I2S0_MCLK FB_ALE/ I2S0_CLKIN
_b
FB_CS1_b/
FB_TS_b
K40 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
60
Preliminary
Freescale Semiconductor, Inc.