MC68332ACEH25 Datasheet, PDF (59/88 Pages) Freescale Semiconductor, Inc – Technical Summary 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
TCR1P — Timer Count Register 1 Prescaler Control
TCR1 is clocked from the output of a prescaler. The prescaler's input is the internal TPU system clock
divided by either 4 or 32, depending on the value of the PSCK bit. The prescaler divides this input by 1,
2, 4, or 8. Channels using TCR1 have the capability to resolve down to the TPU system clock divided
by 4.
SYSTEM
CLOCK
÷4
DIV4 CLOCK
÷ 32
DIV32 CLOCK
PSCK
MUX
1 – DIV4
0 – DIV32
TCR1
PRESCALER
00 ÷ 1
01 ÷ 2
10 ÷ 4
11 ÷ 8
0
15
TCR1
PRESCALER CTL BLOCK 1
TCR1 Prescaler
00
01
10
11
Divide
By
1
2
4
8
PSCK = 0
Number of
Clocks
Rate at
16 MHz
32
2 ms
64
4 ms
128
8 ms
256
16 ms
PSCK = 1
Number of
Clocks
Rate at
16 MHz
4
250 ns
8
500 ns
16
1 ms
32
2 ms
TCR2P — Timer Count Register 2 Prescaler Control
TCR2 is clocked from the output of a prescaler. If T2CG = 0, the input to the TCR2 prescaler is the ex-
ternal TCR2 clock source. If T2CG = 1, the input is the TPU system clock divided by eight. The TCR2P
field specifies the value of the prescaler: 1, 2, 4, or 8. Channels using TCR2 have the capability to re-
solve down to the TPU system clock divided by 8. The following table is a summary of prescaler output.
EXTERNAL
TCR2 PIN
SYNCHRONIZER
DIGITAL
FILTER
A
MUX
B ^CONTROL
TCR2
PRESCALER 0
00 ÷ 1
01 ÷ 2
10 ÷ 4
11 ÷ 8
15
TCR2
INT CLK /8
TCR2 Prescaler
00
01
10
11
Divide By
1
2
4
8
(T2CG CONTROL BIT)
0–A
1–B
PRESCALER CTL BLOCK 2
Internal Clock Divided
By
8
16
32
64
External Clock Divided
By
1
2
4
8
MC68332
MC68332TS/D
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