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K20P32M50SF0 Datasheet, PDF (52/58 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
Table 35. I2S/SAI slave mode timing in VLPR, VLPW, and VLPS modes (full voltage range)
(continued)
Num.
S12
S13
S14
S15
S16
S17
S18
S19
Characteristic
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
(input)
I2S_TX_FS/I2S_RX_FS input setup before
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_FS/I2S_RX_FS input hold after
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output valid
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output invalid
I2S_RXD setup before I2S_RX_BCLK
I2S_RXD hold after I2S_RX_BCLK
I2S_TX_FS input assertion to I2S_TXD output valid1
Min.
45%
30
3
—
0
30
2
—
Max.
55%
—
—
63
—
—
—
72
Unit
MCLK period
ns
ns
ns
ns
ns
ns
ns
1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear
I2S_TX_BCLK/
I2S_RX_BCLK (input)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
S11
S12
S15
S13
S19
S15
S12
S15
S16
S17
S18
S16
S14
S16
Figure 22. I2S/SAI timing — slave modes
6.9 Human-machine interfaces (HMI)
6.9.1 TSI electrical specifications
Table 36. TSI electrical specifications
Symbol
VDDTSI
CELE
Description
Operating voltage
Target electrode capacitance range
Min.
1.71
1
Typ.
—
20
Max.
3.6
500
Table continues on the next page...
Unit
Notes
V
pF
1
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
52
Freescale Semiconductor, Inc.