MCF5282 Datasheet, PDF (515/766 Pages) Freescale Semiconductor, Inc – Microcontroller User’s Manual

General Purpose I/O Module
7
Field —
Reset
R/W:
R
Address
6
CLRn6
5
CLRn5
4
CLRn4
3
CLRn3
2
CLRn2
1
CLRn1
0000_0000
R/W
IPSBAR + 0x10_0049 (CLRQS)
Figure 26-16. Port Clear Output Data Register (7-bit)
0
CLRn0
Field
Reset
R/W:
Address
7
6
—
5
CLRn5
4
CLRn4
3
CLRn3
2
CLRn2
1
CLRn1
0000_0000
R
R/W
IPSBAR + 0x10_0048 (CLRAS), 0x10_004A (CLRSD)
Figure 26-17. Port Clear Output Data Registers (6-bit)
0
CLRn0
Field
Reset
R/W:
Address
7
4
3
2
1
0
—
CLRn3 CLRn2 CLRn1 CLRn0
0000_0000
R
R/W
IPSBAR + 0x10_004B (CLRTC), 0x10_004C (CLRTD), 0x10_004D (CLRUA)
Figure 26-18. Port Clear Output Data Registers (4-bit)
CLRn register bits are described in Table 26-6.
Table 26-6. CLRn (8-bit,7-bit, 6-bit, and 4-bit) Field Descriptions
Register
Bits
8-bit
7–0
7-bit
6–0
6-bit
5–0
4-bit
3–0
7-bit
7
6-bit
7–6
4-bit
7–4
Name
CLRnx
Description
Port n clear output data register bits.
1 Never returned for reads; no effect for writes
0 Always returned for reads; clears corresponding
PORTn bit for writes
—
Reserved, should be cleared.
Freescale Semiconductor
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
26-15