56F8335_07 Datasheet, PDF (48/160 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controller

Table 4-11 Quad Timer A Registers Address Map (Continued)
(TMRA_BASE = $00 F040)
Register Acronym Address Offset
Register Description
TMRA3_CMP1
TMRA3_CMP2
TMRA3_CAP
TMRA3_LOAD
TMRA3_HOLD
TMRA3_CNTR
TMRA3_CTRL
TMRA3_SCR
TMRA3_CMPLD1
TMRA3_CMPLD2
TMRA3_COMSCR
$30
Compare Register 1
$31
Compare Register 2
$32
Capture Register
$33
Load Register
$34
Hold Register
$35
Counter Register
$36
Control Register
$37
Status and Control Register
$38
Comparator Load Register 1
$39
Comparator Load Register 2
$3A
Comparator Status and Control Register
Table 4-12 Quad Timer B Registers Address Map
(TMRB_BASE = $00 F080)
Quad Timer B is NOT available in the 56F8135 device
Register Acronym Address Offset
Register Description
TMRB0_CMP1
TMRB0_CMP2
TMRB0_CAP
TMRB0_LOAD
TMRB0_HOLD
TMRB0_CNTR
TMRB0_CTRL
TMRB0_SCR
TMRB0_CMPLD1
TMRB0_CMPLD2
TMRB0_COMSCR
TMRB1_CMP1
TMRB1_CMP2
TMRB1_CAP
TMRB1_LOAD
TMRB1_HOLD
TMRB1_CNTR
$0
Compare Register 1
$1
Compare Register 2
$2
Capture Register
$3
Load Register
$4
Hold Register
$5
Counter Register
$6
Control Register
$7
Status and Control Register
$8
Comparator Load Register 1
$9
Comparator Load Register 2
$A
Comparator Status and Control Register
Reserved
$10
Compare Register 1
$11
Compare Register 2
$12
Capture Register
$13
Load Register
$14
Hold Register
$15
Counter Register
56F8335 Technical Data, Rev. 5
48
Freescale Semiconductor
Preliminary