IMX53CEC Datasheet, PDF (46/204 Pages) Freescale Semiconductor, Inc – Applications Processors for Consumer Products

Electrical Characteristics
4.6 System Modules Timing
This section contains the timing and electrical parameters for the modules in the i.MX53xD processor.
4.6.1 Reset Timings Parameters
Figure 8 shows the reset timing and Table 31 lists the timing parameters.
RESET_IN
(Input)
CC1
Figure 8. Reset Timing Diagram
Table 31. Reset Timing Parameters
ID
Parameter
Min
CC1 Duration of RESET_IN to be qualified as valid (input slope = 5 ns)
50
4.6.2 WDOG Reset Timing Parameters
Figure 9 shows the WDOG reset timing and Table 32 lists the timing parameters.
Max
Unit
—
ns
WATCHDOG_RST
(Input)
CC5
Figure 9. WATCHDOG_RST Timing Diagram
Table 32. WATCHDOG_RST Timing Parameters
ID
CC5
Parameter
Duration of WATCHDOG_RESET Assertion
Min
Max
1
—
NOTE
CKIL is approximately 32 kHz. T_CKIL is one period or approximately 30 μs.
Unit
T_CKIL
4.6.3 Clock Amplifier Parameters (CKIH1, CKIH2)
The input to Clock Amplifier (CAMP) is internally ac-coupled allowing direct interface to a square wave
or sinusoidal frequency source. No external series capacitors are required.
i.MX53xD Applications Processors for Consumer Products, Rev. 2
46
Freescale Semiconductor