MC33972 Datasheet, PDF (4/28 Pages) Motorola, Inc – Multiple Switch Detection Interface with Suppressed Wake-Up

PIN CONNECTIONS
PIN CONNECTIONS
GND
1
SI
2
SCLK
3
CS
4
SP0
5
SP1
6
SP2
7
SP3
8
SG0
9
SG1
10
SG2
11
SG3
12
SG4
13
SG5
14
SG6
15
VPWR
16
32
SO
31
VDD
30
AMUX
29
INT
28
SP7
27
SP6
26
SP5
25
SP4
24
SG7
23
SG8
22
SG9
21
SG10
20
SG11
19
SG12
18
SG13
17
WAKE
Figure 3. 33972 Pin Connections
Table 2. 33972 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 10.
Pin Number Pin Name
Formal Name
Definition
1
GND
Ground
Ground for logic, analog, and switch to battery inputs.
2
SI
SPI Slave In
SPI control data input pin from MCU to 33972.
3
SCLK
Serial Clock
SPI control clock input pin.
4
CS
Chip Select
SPI control chip select input pin from MCU to 33972. Logic [0} allows data to be
transferred in.
5–8
25 – 28
9 – 15,
18 – 24
16
17
29
30
31
32
SP0 – 3
SP4 – 7
SG0 – 6,
SG13 – 7
VPWR
WAKE
INT
AMUX
VDD
SO
Programmable Switches ^{Programmable switch-to-battery or switch-to-ground input pins.}
0–7
Switch-to-Ground Inputs ^{Switch-to-ground input pins.}
0 – 13
Battery Input
Battery supply input pin. Pin requires external reverse battery protection.
Wake-Up
Open drain wake-up output. Designed to control a power supply enable pin.
Interrupt
Open-drain output to MCU. Used to indicate input switch change of state.
Analog Multiplex Output Analog multiplex output.
Voltage Drain Supply ^{3.3/5.0 V supply. Sets SPI communication level for SO driver.}
SPI Slave Out
Provides digital data from 33972 to MCU.
33972
4
Analog Integrated Circuit Device Data
Freescale Semiconductor