33972_09 Datasheet, PDF (4/32 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface with Suppressed Wake-up

PIN CONNECTIONS
PIN CONNECTIONS
GND
1
32
SI
2
31
SCLK
3
30
CS
4
29
SP0
5
28
SP1
6
27
SP2
7
SP3
8
Exposed Pad
26
25
SG0
9
SG1
10
EK Suffix
24
Only
23
SG2
11
22
SG3
12
21
SG4
13
20
SG5
14
19
SG6
15
EK Suffix
18
VPWR
16
17
SO
VDD
AMUX
INT
SP7
SP6
SP5
SP4
SG7
SG8
SG9
SG10
SG11
SG12
SG13
WAKE
GND
SI
SCLK
CS
SP0
SP1
SP2
SP3
SG0
SG1
SG2
SG3
SG4
SG5
SG6
VPWR
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
20
14
19
15 _{EW / DWB Suffix} 18
16
17
SO
VDD
AMUX
INT
SP7
SP6
SP5
SP4
SG7
SG8
SG9
SG10
SG11
SG12
SG13
WAKE
Figure 3. 33972 Pin Connections
Table 2. 33972 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 10.
Pin Number Pin Name Pin Function
Formal Name
Definition
1
GND
Ground
2
SI
Input
3
SCLK
Input
4
CS
Input
Ground
SPI Slave In
Serial Clock
Chip Select
Ground for logic, analog, and switch to battery inputs.
SPI control data input pin from the MCU to the 33972.
SPI control clock input pin.
SPI control chip select input pin from the MCU to the 33972. Logic [0}
allows data to be transferred in.
5–8
25 – 28
9 – 15,
18 – 24
16
SP0 – 3
SP4 – 7
SG0 – 6,
SG13 – 7
VPWR
Input
Input
Input
Programmable
Switches 0 – 7
Switch-to-Ground
Inputs 0 – 13
Battery Input
Programmable switch-to-battery or switch-to-ground input pins.
Switch-to-ground input pins.
Battery supply input pin. Pin requires external reverse battery
protection.
17
WAKE
Input/Output
Wake-up
Open drain wake-up output. Designed to control a power supply
enable pin.
29
INT
Input/Output
Interrupt
Open-drain output to MCU. Used to indicate an input switch change of
state.
30
AMUX
Output
Analog Multiplex Output ^{Analog multiplex output.}
31
VDD
Input
Voltage Drain Supply 3.3/5.0V supply. Sets SPI communication level for the SO driver.
32
SO
Output
SPI Slave Out
Provides digital data from the 33972 to the MCU.
EP
Ground
Exposed Pad
It is recommended that the exposed pad is terminated to GND (pin 1)
and system ground, however, the device will perform as specified with
the exposed pad unterminated (floating).
33972
4
Analog Integrated Circuit Device Data
Freescale Semiconductor