33972_09 Datasheet, PDF (14/32 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface with Suppressed Wake-up

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
POWER SUPPLY
The 33972 is designed to operate from 5.5 to 40 V on the
VPWR pin. Characteristics are provided from 8.0 to 16 V for
the device. Switch contact currents and the internal logic
supply are generated from the VPWR pin. The VDD supply
pin is used to set the SPI communication voltage levels,
current source for the SO driver, and pull-up current on INT
and CS.
The VDD supply may be removed from the device to
reduce quiescent current. If V_DD is removed while the device
is in Normal mode, the device will remain in Normal mode. If
V_DD is removed in Sleep mode, the device will remain in
Sleep mode until a wake-up input is received (WAKE HIGH to
LOW, switch input or interrupt timer expires).
Removing V_DD from the device disables SPI
communication and will not allow the device to wake up from
INT and CS pins.
POWER-ON RESET (POR)
Applying V_PWR to the device will cause a Power-ON Reset
and place the device in Normal mode.
Default settings from Power-ON Reset via V_PWR or the
Reset Command are as follows:
• Programmable switch – set to switch to battery
• All inputs set as wake-up
• Wetting current on (16 mA)
• Wetting current timer on (20 ms)
• All inputs tri-state
• Analog select 00000 (no input channel selected)
NORMAL AND SLEEP MODES
The 33972 has two operating modes, Normal mode and
Sleep mode. A discussion on Normal mode begins below.
A discussion on Sleep mode begins on page 19.
Normal Mode
Normal mode may be entered by the following events:
• Application of V_PWR to the IC
• Change-of-switch state (when enabled)
• Falling edge of WAKE
• Falling edge of INT (with V_DD = 5.0 V and WAKE at
Logic [1])
• Falling edge of CS (with V_DD = 5.0 V)
• Interrupt timer expires
Only in Normal mode with V_DD applied can the registers of
the 33972 be programmed through the SPI.
The registers that may be programmed in Normal mode
are listed below. Further explanation of each register is
provided in subsequent paragraphs.
•Programmable Switch Register (Settings Command )
•Wake-Up / Interrupt Register (Wake-up / Interrupt
Command )
•Wetting Current Register (Metallic Command )
•Wetting Current Timer Register (Wetting Current Timer
Enable Command )
•Tri-State Register (Tri-state Command )
•Analog Select Register (Analog Command )
•Calibration of Timers (Calibration Command )
•Reset (Reset Command )
Figure 6, page 9, is a graphical description of the device
operation in Normal mode. Switch states are latched into the
input register on the falling edge of CS. The INT to the MCU
is cleared on the rising edge of CS. However, INT will not
clear on rising edge of CS if a switch has closed during SPI
communication (CS LOW). This prevents switch states from
being missed by the MCU.
PROGRAMMABLE SWITCH REGISTER
Inputs SP0 to SP7 may be programmable for switch-to-
battery or switch-to-ground. These inputs types are defined
using the settings command (Table 6). To set an SPn input
for switch-to-battery, a logic [1] for the appropriate bit must be
set. To set an SPn input for switch-to-ground, a logic [0] for
the appropriate bit must be set. The MCU may change or
update the programmable switch register via software at any
time in Normal mode. Regardless of the setting, when the
SPn input switch is closed a logic [1] will be placed in the
serial output response register (Table 17, page 19).
Table 6. Settings Command
Settings Command
Not used
Battery/Ground Select
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 1 X X X X X X X X sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0
WAKE-UP / INTERRUPT REGISTER
The wake-up/interrupt register defines the inputs that are
allowed to wake the 33972 from Sleep Mode or set the INT
pin LOW in Normal mode. Programming the wake-up /
interrupt bit to logic [0] will disable the specific input from
generating an interrupt and will disable the specific input from
waking the IC in Sleep mode (Table 7). Programming the
wake-up /interrupt bit to logic [1] will enable the specific input
to generate an interrupt with switch change of state and will
enable the specific input as wake-up. The MCU may change
or update the wake-up / interrupt register via software at any
time in Normal mode.
33972
14
Analog Integrated Circuit Device Data
Freescale Semiconductor