33972_09 Datasheet, PDF (3/32 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface with Suppressed Wake-up

INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
SP0
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SG0
SG1
SG2
SG3
SG4
SG5
SG6
SG7
SG8
SG9
SG10
SG11
SG12
SG13
V_PWR V_PWR
16.0
2.0
mA
mA
SP0
5.0 V
V_PWR
16.0
mA
2.0
mA
4.0 V
Ref
+
–
To
SPI
Comparator
V_PWR, V_DD, 5.0 V
POR
Bandgap
Sleep PWR
VPWR
VDD
GND
V_PWR V_PWR
16.0
2.0
mA
mA
SP7
16.0
mA
2.0
mA
4.0V
Ref
+
–
To
SPI
Comparator
V_PWR V_PWR
16.0
2.0
mA
mA
SG0
5.0V
V_PWR
4.0 V
Ref
+
–
To
SPI
Comparator
V_PWR V_PWR
16.0
2.0
mA
mA
SG13
4.0 V
Ref
+
–
To
SPI
Comparator
Oscillator
and
Clock Control
Temperature
Monitor and
Control
5.0 V
5.0 V
V_PWR
5.0 V
5.0 V
125 kΩ
WAKE Control
SPI Interface
and Control
V_DD
125 kΩ
INT Control
MUX Interface
V_DD
V_DD
40 μA
V_DD
+
–
Analog Mux
Output
WAKE
INT
CS
SCLK
SI
SO
AMUX
Figure 2. 33972 Simplified Internal Block Diagram
Analog Integrated Circuit Device Data
Freescale Semiconductor
33972
3