56F8014_07 Datasheet, PDF (30/125 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Table 4-2 Interrupt Vector Table Contents¹
Peripheral
Vector
Number
core
core
core
core
core
core
core
core
core
core
core
core
core
core
PS
OCCS
FM
FM
FM
GPIOD
GPIOC
GPIOB
GPIOA
SPI
SPI
SCI
SCI
SCI
SCI
SCI
I²C
Timer
Timer
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33, 34
35
36
37
Priority
Level
3
3
3
3
1-3
1-3
1-3
1-3
1-3
2
1
0
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
Vector Base
Address +
Interrupt Function
P:$00
P:$02
Reserved for Reset Overlay²
Reserved for COP Reset Overlay
P:$04
P:$06
P:$08
Illegal Instruction
SW Interrupt 3
HW Stack Overflow
P:$0A
P:$0C
P:$0E
P:$10
Misaligned Long Word Access
EOnCE Step Counter
EOnCE Breakpoint Unit 0
EOnCE Trace Buffer
P:$12
P:$14
P:$16
EOnCE Transmit Register Empty
EOnCE Receive Register Full
SW Interrupt 2
P:$18
P:$1A
SW Interrupt 1
SW Interrupt 0
Reserved
P:$20
Reserved
Power Sense
P:$22
P:$24
P:$26
PLL Lock, Loss of Clock Reference Interrupt
FM Access Error Interrupt
FM Command Complete
P:$28
FM Command, data and address Buffers Empty
P:$2C
Reserved
GPIOD
P:$2E
P:$30
P:$32
GPIOC
GPIOB
GPIOA
P:$34
P:$36
P:$38
P:$3A
SPI Receiver Full / Error
SPI Transmitter Empty
SCI Transmitter Empty
SCI Transmitter Idle
P:$3C
P:$3E
P:$40
SCI Reserved
SCI Receiver Error
SCI Receiver Full
P:$46
P:$48
P:$4A
Reserved
I²C
Timer Channel 0
Timer Channel 1
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56F8014 Technical Data, Rev. 9
30
Freescale Semiconductor
Preliminary