MC9S08JS16 Datasheet, PDF (3/32 Pages) Freescale Semiconductor, Inc – Technical Data

1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9S08JS16 series MCU.
MCU Block Diagram
BKGD/MS
HCS08 CORE
BDC
CPU
RESET
IRQ
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
IRQ
LVD
USER FLASH (IN BYTES)
MC9S08JS16 = 16,384
MC9S08JS16L = 16,384
MC9S08JS8 = 8,192
MC9S08JS8L = 8,192
USER RAM (IN BYTES)
512
V_SSOSC
V_DD
V_SS
Bootloader ROM (IN BYTES)
4096
MULTI-PURPOSE CLOCK
GENERATOR (MCG)
LOW-POWER OSCILLATOR
SYSTEM
VOLTAGE
REGULATOR
ON-CHIP ICE AND
DEBUG MODULE (DBG)
USB
MODULE
FULL SPEED
USB
USB ENDPOINT _TRANSCEIVER
RAM
8-BIT KEYBOARD
INTERRUPT MODULE (KBI)
8-/16-BIT
SERIAL PERIPHERAL
INTERFACE MODULE (SPI)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI)
KBIPx ₈
MISO
MOSI
SPSCK
SS
RxD
TxD
TPMCH0
2-CHANNEL TIMER/PWM
TPMCH1
MODULE (TPM)
TCLK
8-BIT MODULO TIMER
MODULE (MTIM)
EXTAL
XTAL
16-BIT Cyclic Redundancy
Check Generator
MODULE (CRC)
USBDP
USBDN
PTA0/KBIP0/TPMCH0
PTA1/KBIP1/MISO
PTA2/KBIP2/MOSI
PTA3/KBIP3/SPSCK
PTA4/KBIP4/SS
PTA5/KBIP5/TPMCH1
PTA6/KBIP6/RxD
PTA7/KBIP7/TxD
PTB0/IRQ/TCLK
PTB1/RESET
PTB2/BKGD/MS
PTB3/BLMS
PTB4/XTAL
PTB5/EXTAL
V_USB33
USB 3.3 V VOLTAGE REGULATOR
REAL-TIME COUNTER
(RTC)
NOTES:
1. Port pins are software configurable with pullup device if input port.
2. Pin contains software configurable pullup/pulldown device if IRQ is enabled (IRQPE = 1). Pulldown is enabled if
rising edge detect is selected (IRQEDG = 1).
3. IRQ does not have a clamp diode to V_DD. IRQ must not be driven above V_DD.
4. RESET contains integrated pullup device if PTB1 enabled as reset pin function (RSTPE = 1).
5. Pin contains integrated pullup device.
6. When pin functions as KBI (KBIPEn = 1) and associated pin is configured to enable the pullup device, KBEDGn can
be used to reconfigure the pullup as a pulldown device.
Figure 1. MC9S08JS16 Series Block Diagram
MC9S08JS16 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor
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