56F8025_07 Datasheet, PDF (27/160 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

56F8025 Signal Pins
Table 2-3 56F8025 Signal and Package Information for the 44-Pin LQFP (Continued)
Signal LQFP
Name Pin No.
Type
State During
Reset
Signal Description
GPIOB5
4
(TA1)
Input/
Output
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TA1 — Timer A, Channel 1
(FAULT3)
Input
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
(CLKIN)
Input
External Clock Input— This pin serves as an external clock input.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
GPIOB6
1
(RXD0)
Input/
Output
Input
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data 0 — QSCI0 receive data input.
(SDA⁹)
Input/
Output
Serial Data — This pin serves as the I²C serial data line.
(CLKIN)
Input
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOB6. The peripheral functionality
is controlled via the SIM (See Section 6.3.16) and the CLKMODE bit
of the OCCS Oscillator Control Register.
9_{The SDA signal is also brought out on the GPIOB1 pin.}
GPIOB7
3
(TXD0)
Input/
Output
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Transmit Data 0 — QSCI0 transmit data output or transmit/receive
in single wire operation.
(SCL¹⁰)
Input/
Output
Serial Clock — This pin serves as the I²C serial clock.
After reset, the default state is GPIOB7. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
10_{The SCL signal is also brought out on the GPIOB0 pin.}
56F8025 Data Sheet, Rev. 3
Freescale Semiconductor
27
Preliminary