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MC9S08SH8CSC Datasheet, PDF (264/341 Pages) Freescale Semiconductor, Inc – MC9S08SH8 Datasheet | |||
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Chapter 16 Timer/PWM Module (S08TPMV3)
16.5 Reset Overview
16.5.1 General
The TPM is reset whenever any MCU reset occurs.
16.5.2 Description of Reset Operation
Reset clears the TPMxSC register which disables clocks to the TPM and disables timer overï¬ow interrupts
(TOIE=0). CPWMS, MSnB, MSnA, ELSnB, and ELSnA are all cleared which conï¬gures all TPM
channels for input-capture operation with the associated pins disconnected from I/O pin logic (so all MCU
pins related to the TPM revert to general purpose I/O pins).
16.6 Interrupts
16.6.1 General
The TPM generates an optional interrupt for the main counter overï¬ow and an interrupt for each channel.
The meaning of channel interrupts depends on each channelâs mode of operation. If the channel is
conï¬gured for input capture, the interrupt ï¬ag is set each time the selected input capture edge is
recognized. If the channel is conï¬gured for output compare or PWM modes, the interrupt ï¬ag is set each
time the main timer counter matches the value in the 16-bit channel value register.
All TPM interrupts are listed in Table 16-9 which shows the interrupt name, the name of any local enable
that can block the interrupt request from leaving the TPM and getting recognized by the separate interrupt
processing logic.
Interrupt
TOF
CHnF
Local
Enable
TOIE
CHnIE
Table 16-9. Interrupt Summary
Source
Description
Counter overï¬ow Set each time the timer counter reaches its terminal
count (at transition to next count value which is
usually 0x0000)
Channel event An input capture or output compare event took
place on channel n
The TPM module will provide a high-true interrupt signal. Vectors and priorities are determined at chip
integration time in the interrupt module so refer to the userâs guide for the interrupt module or to the chipâs
complete documentation for details.
16.6.2 Description of Interrupt Operation
For each interrupt source in the TPM, a ï¬ag bit is set upon recognition of the interrupt condition such as
timer overï¬ow, channel-input capture, or output-compare events. This ï¬ag may be read (polled) by
software to determine that the action has occurred, or an associated enable bit (TOIE or CHnIE) can be set
MC9S08SH8 MCU Series Data Sheet, Rev. 3
260
Freescale Semiconductor
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