908E624_12 Datasheet, PDF (26/39 Pages) Freescale Semiconductor, Inc – Integrated Triple High Side Switch Embedded MCU and Lin Serial Communication for Relay Drivers

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
.
Table 7. SPI Register Overview
Read / Write
Information
Write
Read
D7
LINSL2
INTSRC ⁽³⁰⁾
D6
LINSL1
LINWU
or
LINFAIL
D5
LIN-PU
HVF
Bit
D4
D3
HS3ON
HS2ON
LVF
or
BATFAIL ⁽³¹⁾
VDDT
Write Reset Value
0
0
0
0
0
Write Reset Condition
POR,
RESET
POR,
RESET
POR
POR, RESET POR,
RESET
Notes
30. D7 signals interrupts and wake-up interrupts, D6:D0 indicated the source.
31. The first SPI read after reset returns the BATFAIL flag state on bit D4.
D2
HS1ON
HSST
0
POR,
RESET
D1
MODE2
L2
—
—
D0
MODE1
L1
—
—
SPI Control Register (Write)
Table 8 shows the SPI Control register bits by name.
Table 8. Control Bits Function (Write Operation)
D7 D6 D5
D4
D3
D2
D1
D0
LINSL2 LINSL1 LIN-PU HS3ON HS2ON HS1ON MODE2 MODE1
LINSL2 : 1 — LIN Baud Rate and Low-power Mode
Selection Bits
These bits select the LIN slew rate and requested low-
power mode in accordance with Table 9. Reset clears the
LINSL2 : 1 bits.
Table 9. LIN Baud Rate and Low-power Mode Selection
Bits
LINSL2 LINSL1
Description
0
0
Baud Rate up to 20 kbps (normal)
0
1
Baud Rate up to 10 kbps (slow)
1
0
Fast Program Download
Baud Rate up to 100 kbps
1
1
Low-power Mode (Sleep or Stop) Request
LIN-PU — LIN Pull-up Enable Bit
This bit controls the LIN pull-up resistor during Sleep and
Stop modes.
• 1 = Pull-up disconnected in Sleep and Stop modes.
• 0 = Pull-up connected in Sleep and Stop modes.
If the Pull-up is disconnected, a small current source is
used to pull the LIN pin in recessive state. In case of an
erroneous short of the LIN bus to ground, this will significantly
reduce the power consumption, e.g. in combination with
STOP/SLEEP mode.
HS3ON : HS1ON — High Side H3 : HS1 Enable Bits
These bits enable the HSx. Reset clears the HSxON bit.
• 1 = HSx switched on (refer to Note below).
• 0 = HSx switched off.
Note If no PWM on HS1 and HS2 is required, the PWMIN
pin must be connected to the VDD pin.
MODE2 : 1 — Mode Section Bits
The MODE2 : 1 bits control the operating modes and the
watchdog in accordance with Table 10.
Table 10. Mode Selection Bits
MODE2
0
0
1
MODE1
0
1
0
Description
Sleep Mode ⁽³²⁾
Stop Mode ⁽³²⁾
Watchdog Clear ⁽³³⁾
1
1
Run (Normal) Mode
Notes
32. To enter Sleep and Stop mode, a special sequence of SPI
commands is implemented.
33. The device stays in Run (Normal) mode.
To safely enter Sleep or Stop mode and to ensure that
these modes are not affected by noise issue during SPI
transmission, the Sleep / Stop commands require two SPI
transmissions.
Sleep Mode Sequence
The Sleep command, as shown in Table 11, must be sent
twice.
Table 11. Sleep Command Bits
LINSL2 LINSL1 LIN-PU HS3ON HS2ON HS1ON MODE2 MODE1
1
1
0/1
0
0
0
0
0
908E624
26
Analog Integrated Circuit Device Data
Freescale Semiconductor