CRTOUCH Datasheet, PDF (24/68 Pages) Freescale Semiconductor, Inc – Capacitive and Resistive Touch Sensing Application Specific IC.

Serial Communications
3.1.3 I2C transferring data
The number of bytes that can be transmitted per transfer is unrestricted. Each byte has to be followed by an acknowledge bit.
Data is transferred with the most significant bit (MSB) first. Within each byte, there must be 8-data bits and one acknowledge
bit.
3.1.4 I2C acknowledge
Data transfer with acknowledge is obligatory for the I2C protocol. The acknowledge-related clock pulse is generated by the I2C
master as a 9th bit which the recipient uses to handshake reception of each byte of data. Thus each byte transferred effectively
requires 9 bits. To acknowledge a byte, the device sending data through the I2C bus releases the CRTouch line in the 9th bit of
data. In this clock the receiver has to pull down and maintain the CRTouch line stable low during the high period of this clock
pulse as an acknowledgement that the byte was received properly.
When CRTouch does not acknowledge a byte in a transaction it can indicate one of the following conditions:
• The address is trying to be accessed (either read or write) does not exist in the memory map
• The location written does not have write attributes
If the CRTouch does not acknowledge the data byte, the CRTouch line is left high during the acknowledge clock bit and the
master has to generate a STOP or repeat START condition.
Figure 19. I2C Acknowledge
3.1.5 CRTouch I2C slave address
The CRTouch has a 7-bit long slave address. The eight bit following the slave address is the R/W bit used to indicate if the
transaction is going to be a Read or Write transaction (low indicates a write command).
The I2C address has a configurable bit through the AddrSel signal. When connected to ground, bit 1 of the I2C address will be
0 and 1 when connected to V_DD. The resulting two 7 bit addresses possible are: 0x49 and 0x4B.
Figure 20. I2C Slave Address
CRTouch Data Sheet, Rev. 3
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Freescale Semiconductor