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CRTOUCH Datasheet, PDF (23/68 Pages) Freescale Semiconductor, Inc – Capacitive and Resistive Touch Sensing Application Specific IC.
Serial Communications
Figure 16. I2C START and STOP conditions and timing
3.1.1 I2C bit transfer
Because CRTouch can operate with different voltages, the levels of the logical low and high values are not fixed and depend on
the associated level of VDD.
The data on the SDA line must be stable during the HIGH period of the clock. Any change on the SDA line for data transmission
can only occur when the clock signal on the SCL line is LOW.
Figure 17. Bit Transfer
3.1.2 I2C START and STOP conditions
A transition to low on the SDA line while SCL is high indicates a start (S) condition. A transition to high on the SDA line while
SCL is high defines a STOP (P) condition.
START and STOP conditions are always generated by the master. The bus is free when no master device is engaging the bus
(both SCL and SDA are high). When the bus is free, a master may initiate communication by sending a START signal. The bus
is considered to be busy after the START condition. The bus is considered to be free again at a certain time after the STOP
condition.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition. The START (S) and repeated START
(Sr) are functionally identical, therefore the S symbol will be used as a generic term to represent both the START and repeated
START conditions, unless Sr is particularly relevant.
Figure 18. START and STOP conditions
CRTouch Data Sheet, Rev. 3
Freescale Semiconductor
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