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MC9S08DZ60_08 Datasheet, PDF (221/416 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU) | |||
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Chapter 12 Freescaleâs Controller Area Network (S08MSCANV1)
12.1.1 Features
The basic features of the MSCAN are as follows:
⢠Implementation of the CAN protocol â Version 2.0A/B
â Standard and extended data frames
â Zero to eight bytes data length
â Programmable bit rate up to 1 Mbps1
â Support for remote frames
⢠Five receive buffers with FIFO storage scheme
⢠Three transmit buffers with internal prioritization using a âlocal priorityâ concept
⢠Flexible maskable identiï¬er ï¬lter supports two full-size (32-bit) extended identiï¬er ï¬lters, or four
16-bit ï¬lters, or eight 8-bit ï¬lters
⢠Programmable wakeup functionality with integrated low-pass ï¬lter
⢠Programmable loopback mode supports self-test operation
⢠Programmable listen-only mode for monitoring of CAN bus
⢠Programmable bus-off recovery functionality
⢠Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states
(warning, error passive, bus-off)
⢠Programmable MSCAN clock source either bus clock or oscillator clock
⢠Internal timer for time-stamping of received and transmitted messages
⢠Three low-power modes: sleep, power down, and MSCAN enable
⢠Global initialization of conï¬guration registers
12.1.2 Modes of Operation
The following modes of operation are speciï¬c to the MSCAN. See Section 12.5, âFunctional Description,â
for details.
⢠Listen-Only Mode
⢠MSCAN Sleep Mode
⢠MSCAN Initialization Mode
⢠MSCAN Power Down Mode
⢠Loopback Self Test Mode
1. Depending on the actual bit timing and the clock jitter of the PLL.
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
221
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