MC34932 Datasheet, PDF (20/24 Pages) Freescale Semiconductor, Inc – Dual 5.0 A H-Bridge

ADDITIONAL DOCUMENTATION
PACKAGE DIMENSIONS
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM
Introduction
This thermal addendum is provided as a supplement to the MC34932 technical datasheet. The addendum provides thermal
performance information critical in the design and development of system applications. All electrical, application, and packaging
information is provided in the datasheet.
Package and Thermal Considerations
The MC34932 is offered in a 54-pin SOICW-EP. There is a single heat source (P), a single junction temperature (T_J), and
thermal resistance (R_θJA).
T_J = _RθJA . _P
The stated values are solely for a thermal performance comparison of one package to another in a standardized environment.
This methodology is not meant to, and does not predict the performance of a package in an application-specific environment.
Stated values were obtained by measurement and simulation according to the standards listed below.
Table 6. Table of Thermal Resistance Data
Rating
Value
Unit
Notes
Junction to Ambient
Natural Convection
Single Layer board (1s)
R_θJA
58.8
°C/W
(32)_,(33)
Junction to Ambient
Natural Convection
Four layer board (2s2p)
R_θJA
24.4
°C/W
(32)_,(34)
Junction to Board
Junction to Case (bottom / flag)
Junction to Case (top)
Junction to Package Top
Natural Convection
R_θJB
7.0
°C/W
(35)
R_θJC (bottom)
0.36
°C/W
(38)
R_θJC (top)
18
°C/W
(36)
Ψ_JT
2.0
°C/W
(37)
Notes
32. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
33. Per JEDEC JESD51-2 with the single layer board (JESD51-3) horizontal.
34. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.
35. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top
surface of the board near the package.
36. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).
37. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per
JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.
38. Thermal resistance between the die and the case bottom / flag surface (simulated) (flag bottom side fixed to ambient temperature).
34932
20
Analog Integrated Circuit Device Data
Freescale Semiconductor