MC145572 Datasheet, PDF (191/264 Pages) Freescale Semiconductor, Inc – ISDN U-INTERFACE TRANSCEIVER

10.12
Freescale Semiconductor, Inc.
SWITCHING CHARACTERISTICS FOR SCP INTERFACE
(VDD = 5.0 V ± 5%, TA = – 40 to + 85°C, CL = 50 pF; See Figure 10–2)
Ref. No.
Parameter
Min
Max
Unit
121 SCPCLK Rising Edge Before SCPEN(L) Falling Edge
40
—
ns
122 SCPEN Falling Edge Before SCPCLK Rising Edge
40
—
ns
123 SCPRx Data Valid Before SCPCLK Rising Edge (Setup Time)
20
—
ns
124 SCPRx Data Valid After Rising Edge of SCPCLK (Hold Time)
20
—
ns
125 SCPCLK Frequency
—
4.1
MHz
126 SCPCLK Width Low
50
—
ns
127 SCPCLK Width High
50
—
ns
128 SCPCLK Rising Edge Before SCPEN(L) Rising Edge (See Note 2)
40
—
ns
129 SCPEN Rising Before SCPCLK Rising Edge (See Note 2)
40
—
ns
130 SCPCLK Falling Edge to SCPTx Low–Z
—
40
ns
131 SCPCLK Falling Edge (While SCPEN(L) is Low) to SCPTx Data Valid
—
40
ns
132 SCPEN Rising Edge to SCPTx High–Z
—
30
ns
133 SCPEN Falling Edge to SCPTx Active (Byte Mode)
0
40
ns
NOTES:
1. Measurements are made from the point at which they achieve their guaranteed minimum or maximum logic levels.
2. SCPEN must rise between the rising edge of the eighth SCPCLK and the rising edge of the ninth SCPCLK for an 8–bit
access or the access will be ignored. For a 16–bit access, SCPEN must rise between the rising edge of the sixteenth
SCPCLK and the rising edge of the seventeenth SCPCLK or the access will be ignored.
MOTOROLA
For More InforMmCa1t4io55n7O2 n This Product,
Go to: www.freescale.com
10–29