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MC9S08QB8 Datasheet, PDF (17/36 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit
Electrical Characteristics
Table 11. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient) (continued)
Num C
Characteristic
Symbol Min. Typical1 Max. Unit
7
C
Resolution of trimmed DCO output frequency at fixed voltage
and temperature (not using FTRIM)
Δfdco_res_t
—
± 0.2
± 0.4 %fdco
Total deviation of DCO output from trimmed frequency3
8 C Over full voltage and temperature range
Over fixed voltage and temperature range of 0 to 70 °C
Δfdco_t
— –1.0 to 0.5 ± 2 %fdco
±0.5
±1
10 C FLL acquisition time4
tAcquire
—
—
1
ms
Long term jitter of DCO output clock (averaged over 2-ms
11 C interval)5
CJitter
—
0.02
0.2 %fdco
1 Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.
2 The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.
3 This parameter is characterized and not tested on each device.
4 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
5 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for
a given interval.
1.00%
0.50%
0.00%
-60
-40
-20
0
-0.50%
-1.00%
20
40
60
TBD
80
100
120
-1.50%
-2.00%
Temperature
Figure 12. Deviation of DCO Output from Trimmed Frequency (20 MHz, 3.0 V)
MC9S08QB8 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
17