MC9S08QB8 Datasheet, PDF (1/36 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit

Freescale Semiconductor
Data Sheet: Technical Data
An Energy Efficient Solution by Freescale
MC9S08QB8 Series
Covers: MC9S08QB8 and
MC9S08QB4
Document Number: MC9S08QB8
Rev. 3, 3/2009
MC9S08QB8
28 SOIC
Case 751F
16-Pin TSSOP
Case 948F
24 QFN
TBD ^{Case 1982-01}
Features
• Development Support
• 8-Bit HCS08 Central Processor Unit (CPU)
– Up to 20 MHz CPU at 3.6 V to 1.8 V across temperature
range of –40 °C to 85 °C
– HC08 instruction set with added BGND instruction
– Support for up to 32 interrupt/reset sources
• On-Chip Memory
– Up to 8 KB flash memory read/program/erase over full
operating voltage and temperature
– Up to 512 bytes random-access memory (RAM)
– Security circuitry to prevent unauthorized access to
RAM and flash contents
• Power-Saving Modes
– Two very low power stop modes
– Peripheral clock enable register can disable clocks to
unused modules, thereby reducing currents
– Low power run
– Low power wait
– 6 μs typical wakeup time from stop3 mode
– Typical stop current of 250 nA at 3 V, 25 °C
• Clock Source Options
– Oscillator (XOSC) — Very low-power, loop-control
Pierce oscillator; crystal or ceramic resonator range of
31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal reference; precision trimming of
internal reference allows 0.2% resolution and 2%
deviation over temperature and voltage; supports bus
frequencies from 1 MHz to 10 MHz
• System Protection
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal clock
source or bus clock
– Low-voltage detection with reset or interrupt; selectable
trip points
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash block protection
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
– ADC — 8-channel, 12-bit resolution; 2.5 μs conversion
time; automatic compare function; 1.7 mV/°C
temperature sensor; internal bandgap reference channel;
operation in stop3; fully functional from 3.6 V to 1.8 V.
– ACMP — Analog comparator with selectable interrupt
on rising, falling, or either edge of comparator output;
compare option to fixed internal bandgap reference
voltage; output can be tied internally to TPM input
capture; operation in stop3
– TPM — One 1-channel timer/pulse-width modulator
(TPM) module; selectable input capture, output
compare, or buffered edge- or center-aligned PWM on
each channel; ACMP output can be tied internally to
input capture
– MTIM — 8-bit modulo timer module with optional
prescaler
– RTC — (Real-time counter) 8-bit modulo counter with
binary or decimal based prescaler; external clock source
for precise time base, time-of-day, calendar or task
scheduling functions; free running on-chip low power
oscillator (1 kHz) for cyclic wakeup without external
components; runs in all MCU modes
– SCI — Full duplex non-return to zero (NRZ); LIN
master extended break generation; LIN slave extended
break detection; wakeup on active edge
– KBI — 8-pin keyboard interrupt with selectable edge
and level detection modes
• Input/Output
– 22 GPIOs and one input-only and one output-only pin.
– Hysteresis and configurable pullup device on all input
pins; configurable slew rate and drive strength on all
output pins except PTA5.
• Package Options
– 28-pin SOIC, 24-pin QFN, 16-pin TSSOP
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008-2009. All rights reserved.