MC34164-3 Datasheet, PDF (15/23 Pages) Freescale Semiconductor, Inc – 3.0 A 1.0 MHz Fully Integrated DDR Switch-Mode Power Supply

FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
and the buck converter switching frequency value is
determined by reading the FREQ pin. A soft start cycle is then
initiated to ramp up the output of the buck converter (V_TT).
The buck converter error amplifier uses the voltage on the
VREFOUT pin (V_REF) as its reference voltage. V_REF is equal
to 1/2 V_DDQ, where V_DDQ is applied to the VREFIN pin. This
way, the 34712 assures that V_REF and V_TT voltages track 1/2
V_DDQ to meet DDR requirements.
Soft start is used to prevent the output voltage from
overshooting during startup. At initial startup, the output
capacitor is at zero volts; V_OUT = 0 V. Therefore, the voltage
across the inductor will be PV_IN during the capacitor charge
phase which will create a very sharp di/dt ramp. Allowing the
inductor current to rise too high can result in a large
difference between the charging current and the actual load
current that can result in an undesired voltage spike once the
capacitor is fully charged. The soft start is active each time
the IC goes out of standby or shutdown mode, power is
recycled, or after a fault retry.
To fully take advantage of soft starting, it is recommended
not to enable the 34712 output before introducing VDDQ on
the VREFIN pin. If this happens after a soft start cycle expires
and the VREFIN voltage has a high dv/dt, the output will
naturally track it immediately and ramp up with a fast dv/dt
itself and that will defeat the purpose of soft starting. For
reliable operation, it is best to have the VDDQ voltage
available before enabling the output of the 34712.
After a successful start-up cycle where the device is
enabled, no faults have occurred, and the output voltage has
reached its regulation point, the 34712 pulls the power good
output signal low after a 10 ms reset delay, to indicate to the
host that the device is in normal operation.
PROTECTION AND DIAGNOSTIC FEATURES
The 34712 monitors the application for several fault
conditions to protect the load from overstress. The reaction of
the IC to these faults ranges from turning off the outputs to
just alerting the host that something is wrong. In the following
paragraphs, each fault condition is explained:
Output Overvoltage
An overvoltage condition occurs once the output voltage
goes higher than the rising overvoltage threshold (V_OVR). In
this case, the power good output signal is pulled high, alerting
the host that a fault is present, but the V_TT and V_REF outputs
will stay active. To avoid erroneous overvoltage conditions, a
20 µs filter is implemented. The buck converter will use its
feedback loop to attempt to correct the fault. Once the output
voltage falls below the falling overvoltage threshold (V_OVF),
the fault is cleared and the power good output signal is pulled
low, the device is back in normal operation.
Output Undervoltage
An undervoltage condition occurs once the output voltage
falls below the falling undervoltage threshold (V_UVF). In this
case, the power good output signal is pulled high, alerting the
host that a fault is present, but the V_TT and V_REF outputs will
stay active. To avoid erroneous undervoltage conditions, a
20 µs filter is implemented. The buck converter will use its
feedback loop to attempt to correct the fault. Once the output
voltage rises above the rising undervoltage threshold (V_UVR),
the fault is cleared and the power good output signal is pulled
low, the device is back in normal operation.
Output Over Current
This block detects over current in the Power MOSFETs of
the buck converter. It is comprised of a sense MOSFET and
a comparator. The sense MOSFET acts as a current
detecting device by sampling a ratio of the load current. That
sample is compared via the comparator with an internal
reference to determine if the output is in over current or not.
If the peak current in the output inductor reaches the over
Analog Integrated Circuit Device Data
Freescale Semiconductor
current limit (I_LIM), the converter will start a cycle-by-cycle
operation to limit the current, and a 10 ms over current limit
timer (t_LIM) starts. The converter will stay in this mode of
operation until one of the following occurs:
• The current is reduced back to the normal level before
t_LIM expires, and in this case normal operation is
regained.
• t_LIM expires without regaining normal operation, at
which point the device turns off the output and the
power good output signal is pulled high. At the end of a
time-out period of 100 ms (t_TIMEOUT), the device will
attempt another soft start cycle.
• The device reaches the thermal shutdown limit (T_SDFET)
and turns off the output. The power good output signal
is pulled high.
Short Circuit Current Limit
This block uses the same current detection mechanism as
the over current limit detection block. If the load current
reaches the I_SHORT value, the device reacts by shutting down
the output immediately. This is necessary to prevent damage
in case of a permanent short circuit. Then, at the end of a
time-out period of 100 ms (t_TIMEOUT), the device will attempt
another soft start cycle.
Thermal Shutdown
Thermal limit detection block monitors the temperature of
the device and protects against excessive heating. If the
temperature reaches the thermal shutdown threshold
(T_SDFET), the converter output switches off and the power
good output signal indicates a fault by pulling high. The
device will stay in this state until the temperature has
decreased by the hysteresis value and then After a time-out
period (T_TIMEOUT) of 100 ms, the device will retry
automatically and the output will go through a soft start cycle.
If successful normal operation is regained, the power good
output signal is asserted low to indicate that.
34712
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