MC34164-3 Datasheet, PDF (14/23 Pages) Freescale Semiconductor, Inc – 3.0 A 1.0 MHz Fully Integrated DDR Switch-Mode Power Supply

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
SD = 0 &
STBY = x
V_TT > V_OV
Shutdown
V_TT = Discharge
V_REF = Discharge
PG = 1
Overvoltage
V_TT = ON
V_REF = ON
PG = 1
SD = 1 &
STBY = 1
V_TT < V_OV
V_TT < V_UV
V_TT > V_UV
Undervoltage
V_TT = ON
V_REF = ON
PG = 1
V_IN < 3.0V
Power Off
V_TT = OFF
V_REF = OFF
PG = 1
3.0V < = V_IN < = 6.0V
SD = 1 &
STBY = 0
Standby
V_TT = OFF
V_REF = ON
PG = 1
Normal
V_TT = ON
V_REF = ON
PG = 0
SD = 1 &
STBY = 1
t_TIMEOUT Expired
t_TIMEOUT Expired
Short Circuit
V_TT = OFF
V_REF = OFF
PG = 1
I_OUT > = I_SHORT
T_J < = 145°C &
t_TIMEOUT Expired
Thermal
Shutdown
V_TT = OFF
V_REF = OFF
PG = 1
Over Current
V_TT = OFF
V_REF = ON
PG = 1
I_OUT > = I_LIM
For > = 10ms
T_J > = 170°C
Figure 6. Operation Modes Diagram
MODES OF OPERATION
The 34712 has three primary modes of operation:
Normal Mode
In normal mode, all functions and outputs are fully
operational. To be in this mode, the V_IN needs to be within its
operating range, both Shutdown and Standby inputs are
high, and no faults are present. This mode consumes the
most amount of power.
Standby Mode
This mode is predominantly used in Desktop memory
solutions where the DDR supply is desired to be ACPI
compliant (Advanced Configuration and Power Interface).
When this mode is activated by pulling the STBY pin low, V_TT
is put in High Z state, I_OUT = 0 A, and V_REF stays active. This
is the S3 state Suspend-To-Ram or Self Refresh mode and it
is the lowest DRAM power state. In this mode, the DRAM will
preserve the data. While in this mode, the 34712 consumes
less power than in the normal mode, because the buck
converter and most of the internal blocks are disabled.
Shutdown Mode
In this mode, activated by pulling the SD pin low, the chip
is in a shutdown state and the outputs are all disabled and
discharged. This is the S4/S5 power state or Suspend-To-
Disk state, where the DRAM will loose all of its data content
(no power supplied to the DRAM). The reason to discharge
the V_TT and V_REF lines is to ensure upon exiting, the
Shutdown Mode that V_TT and V_REF are lower than V_DDQ,
otherwise V_TT can remain floating high, and be higher than
V_DDQ upon powering up. In this mode, the 34712 consumes
the least amount of power since almost all of the internal
blocks are disabled.
START-UP SEQUENCE
When power is first applied, the 34712 checks the status
of the SD and STBY pins. If the device is in a shutdown mode,
no block will power up and the output will not attempt to ramp.
If the device is in a standby mode, only the V_DDI internal
supply voltage and the bias currents are established and no
further activities will occur. Once the SD and STBY pins are
released to enable the device, the internal V_DDI POR signal is
also released. The rest of the internal blocks will be enabled
34712
14
Analog Integrated Circuit Device Data
Freescale Semiconductor