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MC34164-3 Datasheet, PDF (11/23 Pages) Freescale Semiconductor, Inc – 3.0 A 1.0 MHz Fully Integrated DDR Switch-Mode Power Supply
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTERNAL SUPPLY VOLTAGE OUTPUT (VDDI)
This is the output of the internal bias voltage regulator.
Connect a 1.0 µF, 6 V low ESR ceramic filter capacitor
between this pin and the GND pin. Filtering any spikes on this
output is essential to the internal circuitry stable operation.
OUTPUT VOLTAGE DISCHARGE PATH (VOUT)
Output voltage of the Buck Converter is connected to this
pin. it only serves as the output discharge path once the SD
signal is asserted.
ERROR AMPLIFIER INVERTING INPUT (INV)
Buck converter error amplifier inverting input. Connect the
VTT voltage directly to this pin.
COMPENSATION INPUT (COMP)
Buck converter external compensation network connects
to this pin. Use a type III compensation network.
INPUT SUPPLY VOLTAGE (VIN)
IC power supply input voltage. Input filtering is required for
the device to operate properly.
POWER GROUND (PGND)
Buck converter and discharge MOSFETs power ground. It
is the source of the buck converter low-side power MOSFET.
SWITCHING NODE (SW)
Buck converter switching node. This pin is connected to
the output inductor.
POWER INPUT VOLTAGE (PVIN)
Buck converter power input voltage. This is the drain of the
buck converter high-side power MOSFET.
BOOTSTRAP INPUT (BOOT)
Bootstrap capacitor input pin. Connect a capacitor (as
discussed on page 19) between this pin and the SW pin to
enhance the gate of the high-side Power MOSFET during
switching.
SHUTDOWN INPUT (SD)
If this pin is tied to the GND pin, the device will be in
Shutdown Mode. If left unconnected or tied to the VIN pin, the
device will be in Normal Mode. The pin has an internal pull up
of 1.5 MΩ. This input accepts the S5 (Suspend-To-Disk)
control signal.
STANDBY INPUT (STBY)
If this pin is tied to the GND pin, the device will be in
Standby Mode. If left unconnected or tied to the VIN pin, the
device will be in Normal Mode. The pin has an internal pull up
of 1.5 MΩ. This input accepts the S3 (Suspend-To-RAM)
control signal.
POWER GOOD OUTPUT SIGNAL (PG)
This is an active low open drain output that is used to
report the status of the device to a host. This output activates
after a successful power up sequence and stays active as
long as the device is in normal operation and is not
experiencing any faults. This output activates after a 10 ms
delay and must be pulled up by an external resistor to a
supply voltage (e.g.,VIN.).
Analog Integrated Circuit Device Data
Freescale Semiconductor
34712
11