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MC9S08FL16 Datasheet, PDF (13/34 Pages) Freescale Semiconductor, Inc – 8-Bit S08 Central Processor Unit (CPU)
Electrical Characteristics
Table 7. DC Characteristics (continued)
Num C
Characteristic
Symbol
Condition
Min. Typical1 Max. Unit
DC injection
Single pin limit
–0.2
—
12 C current 3, 4, Total MCU limit, includes IIC VIN < VSS, VIN > VDD
5
sum of all stressed pins
–5
—
0.2
mA
5
mA
13 C Input capacitance, all pins
CIn
—
—
—
8
pF
14 C RAM retention voltage
15 C POR re-arm voltage6
VRAM
—
VPOR
—
—
0.6
1.0
V
0.9
1.4
2.0
V
16 D POR re-arm time
tPOR
—
10
—
—
μs
Low-voltage detection threshold —
P high range
VDD falling VLVD1
—
17
VDD rising
Low-voltage detection threshold —
P low range
VDD falling VLVD0
—
VDD rising
3.9
4.0
4.1
V
4.0
4.1
4.2
2.48
2.56
2.64
V
2.54
2.62
2.70
Low-voltage warning threshold —
C high range 1
VDD falling VLVW3
—
18
VDD rising
Low-voltage warning threshold —
4.5
4.6
4.7
V
4.6
4.7
4.8
P high range 0
VDD falling VLVW2
—
VDD rising
4.2
4.3
4.4
V
4.3
4.4
4.5
Low-voltage warning threshold
P low range 1
VDD falling VLVW1
—
19
VDD rising
Low-voltage warning threshold —
2.84
2.92
3.00
V
2.90
2.98
3.06
C low range 0
VDD falling VLVW0
—
VDD rising
2.66
2.74
2.82
V
2.72
2.80
2.88
20
C
Low-voltage inhibit reset/recover
hysteresis
Vhys
—
—
100
—
mV
21 C Bandgap voltage reference7
VBG
—
—
1.21
—
V
1 Typical values are measured at 25 °C. Characterized, not tested.
2 The specified resistor value is the actual value internal to the device. The pullup or pulldown value may appear higher when
measured externally on the pin.
3 All functional non-supply pins, except for PTA5 are internally clamped to VSS and VDD.
4 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
5 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If the positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure that external VDD load will shunt current greater than maximum
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
6 Maximum is highest voltage that POR is guaranteed.
7 Factory trimmed at VDD = 5.0 V, Temp = 25 °C
MC9S08FL16 Series Data Sheet, Rev. 2
Freescale Semiconductor
13