MC33897CTEFR2 Datasheet, PDF (12/19 Pages) Freescale Semiconductor, Inc – Single Wire CAN Transceiver

FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33897 Series is intended for use as a physical layer
device in a Single Wire CAN communications bus.
Communications takes place from a single pin over a single
wire using a common ground for a current return path. Two
data rates are available, with the high rate used for factory or
assembly line communications and the lower for actual
system communications where the radiated EMI of the higher
rate could be an issue.
Two pins control the mode of operation (sleep, low speed,
high speed, and high voltage wake-up).
FUNCTIONAL PIN DESCRIPTION
The 33897 Series is intended to be used with an MCU to
control its operation and to process and generate the data for
the bus.
GROUND PINS
The four ground pins are not only for electrical conduction,
their number and locations at each of the four corners serve
also to remove heat from the IC. The biggest benefit of this is
obtained by putting a lot of copper on the PCB in this area
and, if ground is an internal layer, by adding numerous
plated-through connections to it with the largest diameter
holes the layout can use.
TXD DATA
The data driven onto the SWCAN bus is inverted from the
TXD pin. A “1” driven on TXD will result in an undriven
(recessive) state (bus at near zero volts). When the TXD pin
is low, the output goes to a driven state. The voltage and
waveshaping in the driven state is determined by the levels
on the MODE0 and MODE1 Pins (refer to Table 6).
Table 6. Mode Control Logic Levels
Logic Level
MODE0
MODE1
Operation
0
0
Sleep mode
0
1
High voltage wake-up mode
1
0
High speed mode
1
1
Normal mode
MODE CONTROL
The MODE pins control the transmitter filtering and BUS
voltage and the IC Sleep mode operation. Table 6 shows the
mode versus the logic levels on MODE0 and MODE1.
The MODE0 and MODE1 pins have a weak pull-down in
the IC so that in case the pins are not driven, the device will
enter the Sleep mode. This is usually the situation as the
MCU comes out of reset, before the driving signals have
been configured as outputs.
RXD DATA
The data received on the bus is translated to logic levels
on this pin. This pin is a logic high when the bus is in the
recessive state (near zero volts) and is logic low when the
bus is in either the normal or high voltage dominant state.
This is an open-drain type of output that requires an
external resistor to pull it up. When the device is in sleep
mode, the output will be off unless a high voltage wake-up
level is detected on the bus. If the wake-up level is detected,
the output will be driven by the data on the bus. If the level of
the data returns to normal level, the output will return to off
after a short delay unless a non-sleep mode condition is set
by the MCU.
LOAD SWITCH
This switch is ON in all operating modes unless a loss of
ground is detected. If this happens, the switch is opened and
the resistor normally attached to its pin will no longer pass
current to or from the bus.
CNTL OUTPUT
This logic level signal is used to control a V_CC regulator.
When the output is low, the V_CC regulator is expected to
shutdown. This is normally used to shut down the MCU and
all the devices powered by V_CC when the IC is in Sleep mode.
This is done to save power. When the part is taken out of the
Sleep mode by the higher than normal bus voltage, this pin is
asserted high and the V_CC regulator brings its output up to the
regulated level. This starts the MCU, which controls the mode
of the IC. The MCU must change the mode signals to non-
Sleep mode levels in order to keep this pin from going low.
There is a delay to allow the MCU to fully wake-up and take
control after the high voltage signaling is removed before the
level on this output returns low. After a delay time, even if the
bus is at high voltage, the IC will return to Sleep mode if both
MODE pins are low.
33897
12
Analog Integrated Circuit Device Data
Freescale Semiconductor