MC9S12P64VLHR Datasheet, PDF (110/566 Pages) Freescale Semiconductor, Inc – MC9S12P128 Reference Manual

Memory Map Control (S12PMMCV1)
Address
Register
Name
Bit 7
6
5
4
3
0x000A Reserved R
0
0
0
0
0
W
0x000B
MODE
R
0
0
0
0
MODC
W
0x0010 Reserved R
0
0
0
0
0
W
0x0011
DIRECT
R
DP15
W
DP14
DP13
DP12
DP11
0x0012 Reserved R
0
0
0
0
0
W
0x0013 Reserved R
0
0
0
0
0
W
0x0014 Reserved R
0
0
0
0
0
W
0x0015
PPAGE
R
0
0
0
0
PIX3
W
= Unimplemented or Reserved
Figure 3-2. MMC Register Summary
2
0
0
0
DP10
0
0
0
PIX2
1
0
0
0
DP9
0
0
0
PIX1
3.3.2 Register Descriptions
This section consists of the S12PMMC control register descriptions in address order.
3.3.2.1 Mode Register (MODE)
Address: 0x000B
7
6
5
4
3
2
1
R
0
0
0
0
0
0
MODC
W
Reset MODC¹
0
0
0
0
0
0
1. External signal (see Table 3-4).
= Unimplemented or Reserved
Figure 3-3. Mode Register (MODE)
Bit 0
0
0
0
DP8
0
0
0
PIX0
0
0
0
S12P-Family Reference Manual, Rev. 1.13
110
Freescale Semiconductor