MC68882EI25A Datasheet, PDF (1/26 Pages) Freescale Semiconductor, Inc – HCMOS Enhanced Floating-Point Coprocessor

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MOTOROLA
Freescale Semiconductor, Inc.
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byBR5091D
MC68882
Floating-Point Coprocessor
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The MC68882 floating-point coprocessor fully implements the IEEE Standard for Binary Floatin~_+’’,i~’C
Point Arithmetic (ANSI-IEEE Standard 754-1985) for use with the Motorola M68000 Family of ,,~f@&~i$
processors. An upgrade of the MC68881, it is pin and software compatible with an optimiz$d ~~$~
interface providing in excess of 1.5 times the performance of the MC68881. It is implem~~~,, ui;ng
VLSI technology to give systems designers the highest possible functionality in a ph~:W&~&mali
device.
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Intended primarily for use as a coprocessor to the MC68020 or MC68030 32-bi~,~$&@’rocessor
unit (MPU), the MC68882 provides a logical extension to the main MPU integer ~~$~~rocessing
capabilities. This extension is achieved by providing a very high performan~~oatlng-point
arith-
metic unit and a set of floating-point data registers which are analogoust$~~t~ &se of the integer
data registers. The MC68882 instruction set is a natural extension of a~j $afi~r members of the
M68000 Family, and it supports all of the addressing modes of the ~$’~~~. Due to the flexible
bus interface of the M68000 Family, the MC68882 can be used wj~~ ari~,of the MPU devices of the
M68000 Family and as a peripheral to non-M68000 processors{,{~~ :&+,
The major features of the MC68882 are:
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q Eight general purpose floating-point data register%!,,,?*.P.l~,k,M***,..8’tipporting a full 80-bit extended
precision real data format (a 64-bit mantissa plus ~~,~~ bit, and a 15-bit signed exponent).
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q A 67-bit arithmetic unit to allow very fast cal$ula~~ons~ with intermediate
than the extended precision format.
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. A 67-bit barrel shifter for high-speed s~jfl~~b d~erations (for normalizing
precision greater
etc.).
o Special purpose hardware for high-#~~&k~”&nversion of binary real memory operands to and
from” the internal extended forma~J~$,,~#>
. Reduced coprocessor interfac$~~wad
to increase throughput.
. Forty-six instructions, includ~\~,,n,.@..>~.‘{~~,.5.,Jarith metic operations.
. Full conformation to the.#~$~}FEE 754 standard, including all requirements and suggestions,
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. Support of functionsA@”%+,@#ned by the IEEE standard, including a full set of trigonometric
and transcendenta~,:t _{‘.f’&:*wct,.~,:nss,}
q Seven data type$$._~’b_$~_%e_,:,₊ word and long word integers; single, double,
real number$),$ndp-acked binary coded decimal string real numbers.
and extended
precision
q Twenty-t~t~&$,~~tants available in the on-chip ROM, including n, e, and powers of 10,
q Virtual @&@@rY/machine operations.
q Effi~~<#. ~.~.fe\.Chanisms for procedure calls, context switches,
. Q&fiC&~~ent instruction execution with the main processor.
and interrupt
handling.
,4*j&QQlurrent instruction execution of multiple floating-point instructions.
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.$,Y,f,i}~,~i:“:>.$::,,%,+,,*~.I,~!u<$s*.eil> ^{with any host processor, on an 8-, 16-, or 32-bit data bus.}
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This document contains information on a new product. Specifications and information herein are subject to change without notice.
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For More Information On This Product,
Go to: www.freescale.com
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