IMX6DQAEC Datasheet, PDF (1/165 Pages) Freescale Semiconductor, Inc – i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors

Freescale Semiconductor
Data Sheet: Technical Data
Document Number: IMX6DQAEC
Rev. 2.3, 07/2013
MCIMX6QxAxxxxC
MCIMX6DxAxxxxC
i.MX 6Dual/6Quad
Automotive and
Infotainment
Applications Processors
Package Information
Case FCPBGA 21 x 21 mm, 0.8 mm pitch
Ordering Information
See Table 1 on page 3
1 Introduction
The i.MX 6Dual and i.MX 6Quad automotive and
infotainment processors represent Freescale
Semiconductor’s latest achievement in integrated
multimedia applications processors. These processors
are part of a growing family of multimedia-focused
products that offer high-performance processing with a
high degree of functional integration. These processors
target the needs of the growing automotive infotainment,
telematics, HMI, and display-based cluster markets.
The i.MX 6Dual/6Quad processors feature Freescale’s
advanced implementation of the quad
ARM^® Cortex^®-A9 core, which operates at speeds up to
1 GHz. They include 2D and 3D graphics processors, 3D
1080p video processing, and integrated power
management. Each processor provides a 64-bit
DDR3/LVDDR3/LPDDR2-1066 memory interface and
a number of other interfaces for connecting peripherals,
such as WLAN, Bluetooth^®, GPS, hard drive, displays,
and camera sensors.
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Updated Signal Naming Convention . . . . . . . . . . . . 7
2 Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 17
3.2 Recommended Connections for Unused Analog
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4 Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 18
4.2 Power Supplies Requirements and Restrictions . . 30
4.3 Integrated LDO Voltage Regulator Parameters . . . 31
4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 33
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 35
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 36
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 40
4.8 Output Buffer Impedance Parameters . . . . . . . . . . 45
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 49
4.10 General-Purpose Media Interface (GPMI) Timing. 65
4.11 External Peripheral Interface Parameters . . . . . . . 74
5 Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 139
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 139
5.2 Boot Devices Interfaces Allocation . . . . . . . . . . . 140
6 Package Information and Contact Assignments . . . . . . 142
6.1 Updated Signal Naming Convention . . . . . . . . . . 142
6.2 21 x 21 mm Package Information . . . . . . . . . . . . 142
7 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
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