CMP0817BA0-I Datasheet, PDF (4/10 Pages) FIDELIX – 512K x 16 bit Super Low Power and Low Voltage Full CMOS RAM

CMP0817BA0-I
CMOS LPRAM
CAPACITANCE¹⁾ (f=1MHz , TA=25’C)
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
CIN
VIN=0V
-
8
pF
Input/Output capacitance
CIO
1. Capacitance is sampled, not 100% tested.
VIO=0V
-
8
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min
Typ
Max
Unit
Input leakage current
ILI VIN=VSS to VCC
-1
-
1
uA
Output leakage current
ILO /CS=VIH, CS2=VIH, /OE=VIH or /WE=VIL, VIO=VSS to VCC
-1
-
1
uA
ICC1
Cycle time=1us, 100%duty, IIO=0mA, /CS≤0.2V, CS2=VIH,
VIN≤0.2V or VIN≥VCC-0.2V
-
Average operating current
ICC2
Cycle time=Min, IIO=0mA, 100% duty, /CS=VIL, CS2=VIH,
VIN=VIL or VIH
-
1.5
3
mA
15
25
mA
Output low voltage
VOL IOL=0.5mA
0.2VCCQ V
Output high voltage
VOH IOH=-0.5mA
0.8VCCQ
V
Standby Current(TTL)
ISB /CS=VIH, CS2=VIH, Other inputs=VIH or VIL
-
-
0.3
mA
Standby Current(CMOS)
ISB1 /CS≥VCC-0.2V, CS2≤0.2V, Other inputs=0~VCC
-
-
70
uA
4
Revision 0.3
Sep. 2006