TMC2250A Datasheet, PDF (8/23 Pages) Fairchild Semiconductor – Matrix Multiplier 12 x 10 bit, 50 MHz

PRODUCT SPECIFICATION
TMC2250A
Table 5. Coefficient Input Ports
Input Port
Registers Available
KA
KA1, KA2, KA3
KB
KB1, KB2, KB3
KC
KC1, KC2, KC3
3 x 3 Matrix Multiplier (Mode 00)
This mode utilizes all six input and output ports in the basic
configuration to realize a "triple dot product", in which each
output is the sum of all three input words in that column
multiplied by the appropriate stored coefficients. The three
corresponding sums of products are available at the outputs
five clock cycles after the input data are latched, and three
new data words half-LSB rounded to 12 bits are then avail-
able every clock cycle.
X(5)=A(1)KA1(1)+B(1)KB1(1)+C(1)KC1(1)
Y(5)=A(1)KA2(1)+B(1)KB2(1)+C(1)KC2(1)
Z(5)=A(1)KA3(1)+B(1)KB3(1)+C(1)KC3(1)
CLK
CWE
KA, KB, KC
DATA IN A, B, C
MODE CONTROL
X OUT
Y OUT
Z OUT
1
01
K_1
0
2
10
K_2
0
3
11
K_3
1.0
4
5
00
0
0
00
6
0
7
8
KA1 + KB1 + KC1
KA2 + KB2 + KC2
KA3 + KB3 + KC3
Figure 1. 3 x 3 Matrix Multiplier Impulse Response (Mode 00)
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REV. 1.0.2 10/25/00