FXL2TD245 Datasheet, PDF (8/12 Pages) Fairchild Semiconductor – Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies and Signal Levels 3-STATE Outputs and Independent

AC Loading and Waveforms
TEST
SIGNAL
V_CC
DUT
Rtr1
C_L
R_L
OPEN
GND
V_CC x 2
t_PLH, t_PHL
t_PZH, t_PHZ
t_PZL, t_PLZ
Test
t_PLH, t_PHL
t_PLZ, t_PZL
t_PHZ, t_PZH
AC Load Table
V_CCO
1.2V ± 0.1V
1.5V ± 0.1V
1.8V ± 0.15V
2.5V ± 0.2V
3.3V ± 0.3V
Switch
OPEN
V_CCO x 2 at V_CCO = 3.3 ± 0.3V, 2.5V ± 0.2V,
1.8V ± 0.15V, 1.5V ± 0.1V, 1.2V ± 0.1V
GND
Figure 1. AC Test Circuit
C_L
R_L
Rtr1
15pF
2kΩ
2kΩ
15pF
2kΩ
2kΩ
15pF
2kΩ
2kΩ
15pF
2kΩ
2kΩ
15pF
2kΩ
2kΩ
DATA
IN
tpxx
DATA
OUT
Vmi
tpxx
VCCI
GND
Vmo ^VCCO
Input t_R = t_F = 2.0 ns, 10% to 90%
Input t_R = t_F = 2.5ns, 10% to 90%, @ V_I = 3.0V to 3.6V only
Figure 2. Waveform for Inverting
and Non-Inverting Functions
OUTPUT
CONTROL
tPZL
DATA
OUT
Vmi
tPLZ
Vmo
VCCA
GND
VY
VOL
Input t_R = t_F = 2.0 ns, 10% to 90%
Input t_R = t_F = 2.5ns, 10% to 90%, @ V_I = 3.0V to 3.6V only
Figure 3. 3-STATE Output Low Enable
and Disable Times for Low Voltage Logic
OUTPUT
CONTROL
DATA
OUT
tPZH
Vmi
tPHZ
Vmo
VCCA
GND
VOH
VX
Input t_R = t_F = 2.0 ns, 10% to 90%
Input t_R = t_F = 2.5ns, 10% to 90%, @ V_I = 3.0V to 3.6V only
Figure 4. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
V_CC
Symbol 3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V
V_mi
V_CCI / 2
V_CCI / 2
V_CCI / 2
V_mo
V_CCO / 2
V_CCO / 2
V_CCO / 2
V_X
V_OH - 0.3V
V_OH - 0.15V
V_OH - 0.15V
V_Y
V_OL + 0.3V
V_OL + 0.15V
V_OL + 0.15V
For V_mi : V_CCI = V_CCA for Control Pins T/R and OE, or V_CCA / 2
©2005 Fairchild Semiconductor Corporation
FXL2TD245 Rev. 1.0.4
8
1.5V ± 0.1V
V_CCI / 2
V_CCO / 2
V_OH - 0.1V
V_OL + 0.1V
1.2V ± 0.1V
V_CCI / 2
V_CCO / 2
V_OH - 0.1V
V_OL + 0.1V
www.fairchildsemi.com