FOD8012 Datasheet, PDF (8/12 Pages) Fairchild Semiconductor – High CMR, Bi-Directional, Logic Gate Optocoupler

Test Circuits
0.1µF
1
V_OA
2
C_L
3
V_DD1
4
8
7
0.1µF
V_OB
6
5
V_DD2
0V~3.3V
Input
t_PLH
V_IN
t_PHL
3.3V
50%
Output
90%
V_OUT ^10%
t_R
V_OH
50%
V_OL
t_F
Figure 11. Test Circuit for Propogation Delay Time and Rise Time, Fall Time
0.1µF
1
V_OA
2
C_L
8
7
0.1µF
A
B
V_DD2
V_DD1
3
6
4
5
–+
Vcm
Pulse Gen
GND
V_CM
V_OH
Switching Pos. (A), V_IN = 3.3V
0.8 x V_DD
CM_H
V_OL
0.8V
Switching Pos. (B), V_IN = 0V
CM_L
Figure 12. Test Circuit for Instantaneous Common Mode Rejection Voltage
©2010 Fairchild Semiconductor Corporation
FOD8012 Rev. 1.0.5
8
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