FOD8012 Datasheet, PDF (1/12 Pages) Fairchild Semiconductor – High CMR, Bi-Directional, Logic Gate Optocoupler

November 2010
FOD8012
High CMR, Bi-Directional, Logic Gate Optocoupler
Features
■ Full Duplex, Bi-Directional
■ 20kV/µs Minimum Common Mode Rejection
■ High Speed:
– 15Mbit/sec Data Rate (NRZ)
– 60ns max. Propagation Delay
– 15ns max. Pulse Width Distortion
– 30ns max. Propagation Delay Skew
■ 3.3V and 5V CMOS Compatibility
■ Extended industrial temperate range, -40 to +110˚C
temperature range
■ Safety and regulatory approvals
– UL1577, 3750 VAC_RMS for 1 min.
– DIN EN/IEC60747-5-2 (approval pending)
Applications
■ Industrial fieldbus communications
– DeviceNet, CAN, RS485, RS232
■ Microprocessor System Interface
– SPI, I²C
■ Programmable Logic Control
■ Isolated Data Acquisition System
■ Voltage Level Translator
Description
The FOD8012 is a full duplex, bi-directional, high-speed
logic gate Optocoupler, which supports isolated commu-
nications allowing digital signals to communicate
between systems without conducting ground loops or
hazardous voltages. It utilizes Fairchild’s proprietary co-
planar packaging technology, Optoplanar^®, and opti-
IC design to achieve minimum 20kV/µs Common Mode
Noise Rejection (CMR) rating.
This high-speed logic gate optocoupler is highly inte-
grated with 2 optically coupled channels arranged in
bi-directional configuration, and housed in a compact
8-pin small outline package. Each optocoupler channel
consists of a high-speed AlGaAs LED driven by a CMOS
buffer IC coupled to a CMOS detector IC. The detector
IC comprises of an integrated photodiode, a high-speed
trans-impedance amplifier and a voltage comparator
with an output driver. The CMOS technology coupled to
the high efficiency of the LED achieves low power con-
sumption as well as very high speed (60ns propagation
delay, 15ns pulse width distortion).
Related Resources
■ FOD8001, High Noise Immunity, 3.3V/5V Logic Gate
Optocoupler Datasheet
■ www.fairchildsemi.com/products/opto/
Functional Schematic
V_DD1 1
V_OA 2
8 V_DD2
7 V_INA
V_{INB 3}
6 ^VOB
GND₁ 4
5 GND₂
0.1µF bypass capacitor required from V_DD to GND
©2010 Fairchild Semiconductor Corporation
FOD8012 Rev. 1.0.5
Truth Table
VIN
LED
VO
High
Low
OFF
ON
High
Low
www.fairchildsemi.com