RFG45N06 Datasheet, PDF (6/6 Pages) Fairchild Semiconductor – 45A, 60V, Avalanche Rated N-Channel Enhancement-Mode Power MOSFETs

RFG45N06, RFP45N06, RF1S45N06, RF1S45N06SM
Temperature Compensated PSPICE Model for the
RFG45N06, RFP45N06, RF1S45N06, RF1S45N06SM
.SUBCKT RFP45N06 2 1 3
REV 1/18/93
*NOM TEMP = +25^oC
CA 12 8 3.49E-9
CB 15 14 3.8E-9
CIN 6 8 2E-9
DBODY 7 5 DBDMOD
DBREAK 5 11DBKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 66.5
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1E-9
LGATE 1 9 5.65E-9
LSOURCE 3 7 4.13E-9
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
GATE
9
20
1
LGATE RGATE
5
10
-
DPLCAP
RDRAIN
ESG
6
8
+
EVTO
18 ^{- 6}
8
RIN
16
VTO
-
21
MOS1
CIN
DBREAK
MOS2
11 ⁺
EBREAK
17
18
-
DRAIN
2
LDRAIN
DBODY
S1A
12
13
8
S2A
14 ¹⁵
13
8
RSOURCE
7 ^LSOURCE
3
SOURCE
RBREAK
17
18
S1B
S2B
CA
13
CB
+
EGS
-
6
8
+
EDS
-
14
5
8
RVTO
IT
19
-
VBAT
+
RBREAK 17 18 RBKMOD 1
RDRAIN 5 16 RDSMOD 3.58E-3
RGATE 9 20 0.681
RIN 6 8 1E9
RSOURCE 8 7 RDSMOD 13.6E-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.92
.MODEL DBDMOD D (IS=8.2E-13 RS=7.86E-3 TRS1=2.26E-3 TRS2=2.90E-6 CJO=2.07E-9 TT=5.72E-8)
.MODEL DBKMOD D (RS=1.93E-1 TRS1=5.13E-4 TRS2=-2.15E-5)
.MODEL DPLCAPMOD D (CJO=1.25E-9 IS=1E-30 N=10)
.MODEL MOSMOD NMOS (VTO=3.862 KP=55.57 IS=1E-30 N=10 TOX=1 L=1U W=1U)
.MODEL RBKMOD RES (TC1=1.12E-3 TC2=-5.18E-7)
.MODEL RDSMOD RES (TC1=4.64E-3 TC2=1.58E-5)
.MODEL RVTOMOD RES (TC1=-4.27E-3 TC2=-6.55E-6)
.MODEL S1AMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-6.5 VOFF=-1.7)
.MODEL S1BMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-1.7 VOFF=-6.5)
.MODEL S2AMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-3.0 VOFF=2)
.MODEL S2BMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=2.0 VOFF=-3.0)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global
Temperature Options; authors, William J. Hepp and C. Frank Wheatley.
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