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GTLP16616 Datasheet, PDF (6/10 Pages) Fairchild Semiconductor – 17-Bit TTL/GTLP Bus Transceiver with Buffered Clock | |||
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AC Operating Requirements
Over recommended ranges of supply voltage and operating free-air temperature, VREF = 1.0V (unless otherwise noted).
Symbol
Min
Max
fCLOCK
Max Clock Frequency
175
tW
Pulse Duration
LEAB or LEBA HIGH
3.0
CLKAB or CLKBA HIGH or LOW
3.2
tS
Setup Time
A before CLKABâ
0.5
B before CLKBAâ
3.1
A before LEABâ
1.3
B before LEBAâ
3.7
CEAB before CLKABâ
0.7
CEBA before CLKBAâ
1.0
tH
Hold Time
A after CLKABâ
1.5
B after CLKBAâ
0.0
A after LEABâ
0.5
B after LEBAâ
0.0
CEAB after CLKABâ
1.5
CEBA after CLKBAâ
1.7
Unit
MHz
ns
ns
ns
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