FAN3268_11 Datasheet, PDF (6/16 Pages) Fairchild Semiconductor – 2A Low-Voltage PMOS-NMOS Bridge Driver

Electrical Characteristics (Continued)
Unless otherwise noted, V_DD=12V and T_J=-40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
ENABLE
V_ENL
V_ENH
V_HYS
R_PU
Enable Logic Low Threshold
Enable Logic High Threshold
Logic Hysteresis Voltage⁽⁹⁾
Enable Pull-up Resistance⁽⁹⁾
EN from 5V to 0V
EN from 0V to 5V
OUTPUT
I_SINK Out Current, Mid-Voltage, Sinking⁽⁹⁾
I_SOURCE Out Current, Mid-Voltage, Sourcing⁽⁹⁾
I_{PK_SINK} Out Current, Peak, Sinking⁽⁹⁾
I_{PK_SOURCE} Out Current, Peak, Sourcing⁽⁹⁾
t_RISE Output Rise Time⁽¹⁰⁾
t_FALL Output Fall Time⁽¹⁰⁾
t_D1
Propagation Delay ⁽¹⁰⁾
t_D2
Propagation Delay ⁽¹⁰⁾
Out at V_DD/2,
C_LOAD=0.1µF, f=1kHz
Out at V_DD/2,
C_LOAD=0.1µF, f=1kHz
C_LOAD=0.1µF, f=1kHz
C_LOAD=0.1µF, f=1kHz
C_LOAD=1000pF
C_LOAD=1000pF
0 - 5V_IN, 1V/ns Slew Rate
0 - 5V_IN, 1V/ns Slew Rate
Notes:
8. EN inputs have TTL thresholds; refer to the ENABLE section.
9. Not tested in production.
10. See the Timing Diagrams of Figure 4 and Figure 5.
0.8 1.2
V
1.6 2.0
V
0.4
V
100
kΩ
2.4
A
-1.6
A
3
A
-3
A
12 22 ns
9
17 ns
7
14 25 ns
10
19 34 ns
Timing Diagrams
Figure 4. Non-Inverting
Figure 5. Inverting
© 2009 Fairchild Semiconductor Corporation
FAN3268 • Rev. 1.0.1
6
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