FAN3268_11 Datasheet, PDF (3/16 Pages) Fairchild Semiconductor – 2A Low-Voltage PMOS-NMOS Bridge Driver

Pin Definitions
Pin#
1
8
3
2
4
7
5
6
Name
Description
ENA Enable Input for Channel A. Pull pin low to inhibit driver A. ENA has TTL thresholds.
ENB Enable Input for Channel B. Pull pin low to inhibit driver B. ENB has TTL thresholds.
GND Ground. Common ground reference for input and output circuits.
INA Input to Channel A.
INB Input to Channel B.
OUTA
Gate Drive Output A: Held low unless required input(s) are present and V_DD is above the UVLO
threshold.
OUTB
Gate Drive Output B (inverted from the input): Held high unless required input is present and V_DD
is above UVLO threshold.
VDD Supply Voltage. Provides power to the IC.
Output Logic
FAN3268 (Channel A)
ENA
INA
OUTA
0
0⁽⁷⁾
0
0
1
0
1⁽⁷⁾
0⁽⁷⁾
0
1⁽⁷⁾
1
1
Note:
7. Default input signal if no external connection is made.
ENB
0
0
1⁽⁷⁾
1⁽⁷⁾
FAN3268 (Channel B)
INB
0⁽⁷⁾
1
0⁽⁷⁾
1
OUTB
1
1
1
0
© 2009 Fairchild Semiconductor Corporation
FAN3268 • Rev. 1.0.1
3
www.fairchildsemi.com