FAN3268 Datasheet, PDF (6/16 Pages) Fairchild Semiconductor – 2A Low-Voltage PMOS-NMOS Bridge Driver

Electrical Characteristics (Continued)
Unless otherwise noted, VDD=12V and TJ=-40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
ENABLE
VENL Enable Logic Low Threshold
EN from 5V to 0V
VENH
VHYS
RPU
Enable Logic High Threshold
Logic Hysteresis Voltage⁽⁹⁾
Enable Pull-up Resistance⁽⁹⁾
EN from 0V to 5V
OUTPUT
ISINK Out Current, Mid-Voltage, Sinking⁽⁹⁾
Out at VDD/2,
CLOAD=0.1µF, f=1kHz
ISOURCE Out Current, Mid-Voltage, Sourcing⁽⁹⁾
IPK_SINK Out Current, Peak, Sinking⁽⁹⁾
IPK_SOURCE Out Current, Peak, Sourcing⁽⁹⁾
Out at VDD/2,
CLOAD=0.1µF, f=1kHz
CLOAD=0.1µF, f=1kHz
CLOAD=0.1µF, f=1kHz
tRISE
tFALL
tD1
tD2
Output Rise Time⁽¹⁰⁾
Output Fall Time⁽¹⁰⁾
Propagation Delay ⁽¹⁰⁾
Propagation Delay ⁽¹⁰⁾
CLOAD=1000pF
CLOAD=1000pF
0 - 5VIN, 1V/ns Slew Rate
0 - 5VIN, 1V/ns Slew Rate
Notes:
8. EN inputs have TTL thresholds; refer to the ENABLE section.
9. Not tested in production.
10. See the Timing Diagrams of Figure 4 and Figure 5.
0.8 1.2
V
1.6 2.0 V
0.4
V
100
kΩ
2.4
A
-1.6
A
3
A
-3
A
12 22 ns
9
17 ns
7
14 25 ns
10
19 34 ns
Timing Diagrams
Figure 4. Non-Inverting
Figure 5. Inverting
© 2009 Fairchild Semiconductor Corporation
FAN3268 • Rev. 1.0.0
6
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