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FAN3268 Datasheet, PDF (13/16 Pages) Fairchild Semiconductor – 2A Low-Voltage PMOS-NMOS Bridge Driver
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components, PGATE and PDYNAMIC:
PTOTAL=PGATE + PDYNAMIC
(1)
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
source voltage, VGS, with gate charge, QG, at
switching frequency, fSW, is determined by:
PGATE=QG • VGS • fSW • n
(2)
where n is the number of driver channels in use
(1 or 2).
Dynamic Pre-drive / Shoot-through Current: A
power loss resulting from internal current
consumption under dynamic operating conditions,
including pin pull-up / pull-down resistors, can be
obtained using the “IDD (No-Load) vs. Frequency”
graphs in Typical Performance Characteristics to
determine the current IDYNAMIC drawn from VDD
under actual operating conditions:
PDYNAMIC=IDYNAMIC • VDD • n
(3)
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming ψJB was determined for a similar thermal
design (heat sinking and air flow):
TJ =PTOTAL • ψJB + TB
(4)
where:
TJ =driver junction temperature
ψJB =(psi) thermal characterization parameter relating
temperature rise to total power dissipation
TB =board temperature in location defined in
Note 1 under Thermal Resistance table.
As an example of a power dissipation calculation,
consider an application driving two MOSFETs with a
gate charge of 60nC with VGS=VDD=7V. At a switching
frequency of 500kHz, the total power dissipation is:
PGATE=60nC • 7V • 500kHz • 2=0.42W
(5)
PDYNAMIC=3mA • 7V • 2=0.042W
(6)
PTOTAL=0.46W
(7)
The SOIC-8 has a junction-to-board thermal
characterization parameter of ψJB=43°C/W. In a system
application, the localized temperature around the device
is a function of the layout and construction of the PCB
along with airflow across the surfaces. To ensure
reliable operation, the maximum junction temperature of
the device must be prevented from exceeding the
maximum rating of 150°C; with 80% derating, TJ would
be limited to 120°C. Rearranging Equation 4 determines
the board temperature required to maintain the junction
temperature below 120°C:
TB=TJ - PTOTAL • ψJB
(8)
TB=120°C – 0.46W • 43°C/W=100°C
(9)
© 2009 Fairchild Semiconductor Corporation
FAN3268 • Rev. 1.0.0
13
www.fairchildsemi.com