FAN3121 Datasheet, PDF (6/21 Pages) Fairchild Semiconductor – Single 9A High-Speed, Low-Side Gate Driver

Electrical Characteristics
Unless otherwise noted, VDD=12V and TJ=-40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
Supply
VDD Operating Range
TTL
IDD
Supply Current, Inputs / EN Not Connected _CMOS(8)
VON Turn-On Voltage
VOFF Turn-Off Voltage
Inputs (FAN312xT)⁽⁹⁾
4.5
18.0 V
0.65 0.90
mA
0.58 0.85
3.5 4.0 4.3 V
3.30 3.75 4.10 V
VIL_T INx Logic Low Threshold
VIH_T INx Logic High Threshold
IIN+ Non-Inverting Input Current
IIN- Inverting Input Current
VHYS_T TTL Logic Hysteresis Voltage
Inputs (FAN312xC)⁽⁹⁾
IN from 0 to VDD
IN from 0 to VDD
0.8 1.0
V
1.7 2.0 V
-1
175 µA
-175
1
µA
0.40 0.70 0.85 V
VIL_C INx Logic Low Threshold
VIH_C INx Logic High Threshold
IIN+ Non-Inverting Input Current
IIN- Inverting Input Current
VHYS_C CMOS Logic Hysteresis Voltage
ENABLE (FAN3121, FAN3122)
IN from 0 to VDD
IN from 0 to VDD
30 38
55
-1
-175
12 17
%VDD
70 %VDD
175 µA
1
µA
24 %VDD
VENL
VENH
VHYS_T
RPU
tD1, tD2
tD1, tD2
Output
Enable Logic Low Threshold
Enable Logic High Threshold
TTL Logic Hysteresis Voltage
Enable Pull-up Resistance
Propagation Delay, EN Rising⁽¹⁰⁾
Propagation Delay, EN Falling⁽¹⁰⁾
EN from 5V to 0V
EN from 0V to 5V
1.2 1.6 2.0 V
1.8 2.2 2.6 V
0.2 0.6 0.8 V
68 100 134 kΩ
8 17 27 ns
14 21 33 ns
ISINK OUT Current, Mid-Voltage, Sinking⁽¹¹⁾
OUT at VDD/2, CLOAD=1.0µF,
f=1kHz
9.7
A
ISOURCE OUT Current, Mid-Voltage, Sourcing⁽¹¹⁾
OUT at VDD/2, CLOAD=1.0µF,
f=1kHz
7.1
A
IPK_SINK OUT Current, Peak, Sinking⁽¹¹⁾
CLOAD=1.0µF, f=1kHz
11.4
A
IPK_SOURCE OUT Current, Peak, Sourcing⁽¹¹⁾
CLOAD=1.0µF, f=1kHz
10.6
A
tRISE Output Rise Time⁽¹⁰⁾
CLOAD=10nF
18 23
29 ns
tFALL Output Fall Time⁽¹⁰⁾
CLOAD=10nF
11 19
27 ns
tD1, tD2 Output Propagation Delay, CMOS Inputs⁽¹⁰⁾ 0 – 12VIN, 1V/ns Slew Rate
9
18
28 ns
tD1, tD2 Output Propagation Delay, TTL Inputs⁽¹⁰⁾ 0 – 5VIN, 1V/ns Slew Rate
9
23
35 ns
IRVS Output Reverse Current Withstand⁽¹¹⁾
1500
mA
Notes:
8. Lower supply current due to inactive TTL circuitry.
9. EN inputs have modified TTL thresholds; refer to the ENABLE section.
10. See Timing Diagrams of Figure 8 and Figure 9.
11. Not tested in production.
© 2008 Fairchild Semiconductor Corporation
FAN3121 / FAN3122 • Rev. 1.0.0
6
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