FOD2200_08 Datasheet, PDF (5/11 Pages) Fairchild Semiconductor – Low Input Current Logic Gate Optocouplers

Test Circuits
PULSE GEN.
t_r = t_f = 5 ns
f = 100 kHz
10 % DUTY
CYCLE
V_O = 5 V
1
I_F
2
INPUT
MONITORING
NODE
3
R₁
C₁ = ⁴
120 pF
FOD2200
V_{CC 8}
7
6
GND ₅
V_CC
OUTPUT V_O
MONITORING
NODE
5V
D₁
619 Ω
C₂ =
D₂
15 pF
D₃
5 kΩ
D₄
INPUT IF
THE PROBE AND JIG CAPACITANCES
ARE INCLUDED IN C ₁ AND C_2.
R_I 2.15 kΩ 1.10 kΩ 681 Ω
I_F (ON) 1.6 mA 3 mA 5 mA
ALL DIODES ARE 1N916 OR 1N3064.
IF (ON)
50 % IF (ON)
0 mA
OUTPUT
V_O
tPLH tPHL
VOH
1.3 V
V_OL
Fig. 1. Test Circuit and Waveforms for t_PLH, t_PHL, t_r and t_f
PULSE
GENERATOR
Z_O = 50 Ω
t_r = t_f = 5 ns
C_L= 15 pF INCLUDING PROBE
AND JIG CAPACITANCES .
V_CC
FOD2200
V_O
+5 V
S1
1
V_{CC 8}
I_F
2
7
D₁
619 Ω
3
4
INPUT V_C
MONITORING
NODE
6
GND ₅
C_L
D₂
5 kΩ
D₃
D₄
S2
D_1-4 ARE 1N916 OR 1N3064.
INPUT
VE
tPZL
tPLZ
3.0 V
1.3 V
0V
S1 AND
S2 CLOSED
OUTPUT
VO
OUTPUT
VO
S1 CLOSED
S2 OPEN
tPZH
S1 OPEN
S2 CLOSED
1.3 V ^{0.5 V}
0.5 V
1.3 V
0V
tPHZ
VOL
VOH
≈1.5 V
S1 AND
S2 CLOSED
Fig. 2. Test Circuit and Waveforms for t_PHZ, t_PZH, t_PLZ, and t_PZL
©2004 Fairchild Semiconductor Corporation
FOD2200 Rev. 1.0.1
5
www.fairchildsemi.com