FAN5093 Datasheet, PDF (5/17 Pages) Fairchild Semiconductor – Two Phase Interleaved Synchronous Buck Converter for VRM 9.x Applications

PRODUCT SPECIFICATION
Gate Drive Test Circuit
VOUT
3000pF
tR
10%
90%
2V
tDT
2V
tF
90%
2.5V
10%
HDRV
tDT
2V
LDRV
Figure 1. Output Drive Timing Diagram
Table 1. Output Voltage Programming Codes
VID4
VID3
VID2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
0
1
1
0
1
1
0
1
1
0
0
1
0
0
1
0
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
0
1
0
0
1
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
Note:
1. 0 = VID pin is tied to GND.
1 = VID pin is pulled up to 5V.
REV. 1.1.0 3/27/03
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
FAN5093
VOUT to CPU
OFF
1.100V
1.125V
1.150V
1.175V
1.200V
1.225V
1.250V
1.275V
1.300V
1.325V
1.350V
1.375V
1.400V
1.425V
1.450V
1.475V
1.500V
1.525V
1.550V
1.575V
1.600V
1.625V
1.650V
1.675V
1.700V
1.725V
1.750V
1.775V
1.800V
1.825V
1.850V
5