FAN5093 Datasheet, PDF (11/17 Pages) Fairchild Semiconductor – Two Phase Interleaved Synchronous Buck Converter for VRM 9.x Applications

PRODUCT SPECIFICATION
FAN5093
Adaptive Delay Gate Drive
The FAN5093 embodies an advanced design that ensures
minimum MOSFET transition times while eliminating
shoot-through current. It senses the state of the MOSFETs
and adjusts the gate drive adaptively to ensure that they are
never on simultaneously. When the high-side MOSFET turns
off, the voltage on its source begins to fall. When the voltage
there reaches approximately 2.5V, the low-side MOSFETs
gate drive is applied. When the low-side MOSFET turns off,
the voltage at the LDRV pin is sensed. When it drops below
approximately 2V, the high-side MOSFET’s gate drive is
applied.
Maximum Duty Cycle
In order to ensure that the current-sensing and charge-
pumping work, the FAN5093 guarantees that the low-side
MOSFET will be on a certain portion of each period. For low
frequencies, this occurs as a maximum duty cycle of approxi-
mately 90%. Thus at 250KHz, with a period of 4µsec, the
low-side will be on at least 4µsec • 10% = 400nsec. At higher
frequencies, this time might fall so low as to be ineffective.
The FAN5093 guarantees a minimum low-side on-time of
approximately 330nsec, regardless of duty cycle.
Current Sensing
The FAN5093 has two independent current sensors, one for
each phase. Current sensing is accomplished by measuring
the source-to-drain voltage of the low-side MOSFET during
its on-time. Each phase has its own power ground pin, to per-
mit the phases to be placed in different locations without
affecting measurement accuracy. For best results, it is impor-
tant to connect the PGND and SW pins for each phase as a
Kelvin trace pair directly to the source and drain, respec-
tively, of the appropriate low-side MOSFET. Care is required
in the layout of these grounds; see the layout guidelines in
this datasheet.
Current Sharing
The two independent current sensors of the FAN5093 operate
with their independent current control loops to guarantee that
the two phases each deliver half of the total output current.
The only mismatch between the two phases occurs if there is
a mismatch between the RDS,on of the low-side MOSFETs.
Light Load Efficiency
At light load, the FAN5093 uses a number of techniques to
improve efficiency. Because a synchronous buck converter is
two quadrant, able to both source and sink current, during
light load the inductor current will flow away from the out-
put and towards the input during a portion of the switching
cycle. This reverse current flow is detected by the FAN5093
as a positive voltage appearing on the low-side MOSFET
during its on-time. When reverse current flow is detected,
the low-side MOSFET is turned off for the rest of the cycle,
and the current instead flows through the body diode of the
high-side MOSFET, returning the power to the source. This
technique substantially enhances light load efficiency.
Short Circuit Current Characteristics
(ILIM Pin)
The FAN5093 short circuit current characteristic includes a
function that protects the DC-DC converter from damage in
the event of a short circuit. The short circuit limit is set with
the RS resistor, as given by the formula
R_S(Ω) = I_SC • R_{DS, on} • R_T • 3.33
with ISC the desired output current limit, RT the oscillator
resistor and RDS,on one phase’s low-side MOSFET’s on
resistance. Remember to make the RS large enough to
include the effects of initial tolerance and temperature varia-
tion on the MOSFETs’ RDS,on.
Important Note! The oscillator frequency must be selected
before selecting the current limit resistor, because the value
of RT is used in the calculation of RS.
When an overcurrent is detected, the high-side MOSFETs
are turned off, and the low-side MOSFETs are turned on,
and they remain in this state until the measured current
through the low-side MOSFET has returned to zero amps.
After reaching zero, the FAN5093 re-soft-starts, ensuring
that it can also safely turn on into a short.
A limitation on the current sense circuit is that ISC • RDS,on
must be less that 375mV. To ensure correct operation, use
ISC • RDS,on ≤ 300mV; between 300mV and 375mV, there
will be some non-linearity in the short-circuit current not
accounted for in the equation.
As an example, consider the typical characteristic of the
DC-DC converter circuit with two FDP6670AL low-side
MOSFETs (RDS = 6.5mΩ maximum at 25°C • 1.2 at 75°C
= 7.8mΩ each, or 3.9mΩ total) in each phase, RT = 42.1KΩ
(600KHz oscillator) and a 50KΩ RS.
The converter exhibits a normal load regulation characteris-
tic until the voltage across the MOSFETs exceeds the inter-
nal short circuit threshold of 50KΩ/(3.9mΩ • 41.2KΩ • 6.66)
= 47A. [Note that this current limit level can be as high as
50KΩ/(3.5mΩ • 41.2KΩ • 6.66) = 52A, if the MOSFETs
have typical RDS,on rather than maximum, and are at 25°C.]
At this point, the internal comparator trips and signals the
controller to leave on the low-side MOSFETs and keep off
the high-side MOSFETs. The inductor current decreases,
and power is not applied again until the inductor current
reaches 0A and the converter attempts to re-softstart.
E*-mode
In addition, further enhancement in efficiency can be
obtained by putting the FAN5093 into E*-mode. When the
Droop pin is pulled to the 5V BYPASS voltage, the “A”
phase of the FAN5093 is completly turned off, reducing in
half the amount of gate charge power being consumed.
E*-mode can be implemented with the circuit shown in
Figure 3.
REV. 1.1.0 3/27/03
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